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[Qemu-ppc] [PATCH v4 14/15] target/ppc: use tcg ops for neg instruction
From: |
Nikunj A Dadhania |
Subject: |
[Qemu-ppc] [PATCH v4 14/15] target/ppc: use tcg ops for neg instruction |
Date: |
Fri, 24 Feb 2017 01:26:39 +0530 |
Signed-off-by: Nikunj A Dadhania <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
target/ppc/translate.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index dc75cca..5af9667 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -1583,7 +1583,10 @@ static inline void gen_op_arith_neg(DisasContext *ctx,
bool compute_ov)
static void gen_neg(DisasContext *ctx)
{
- gen_op_arith_neg(ctx, 0);
+ tcg_gen_neg_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
+ if (unlikely(Rc(ctx->opcode))) {
+ gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
+ }
}
static void gen_nego(DisasContext *ctx)
--
2.7.4
- [Qemu-ppc] [PATCH v4 07/15] target/ppc: support for 32-bit carry and overflow, (continued)
- [Qemu-ppc] [PATCH v4 07/15] target/ppc: support for 32-bit carry and overflow, Nikunj A Dadhania, 2017/02/23
- [Qemu-ppc] [PATCH v4 06/15] target/ppc: remove xer split-out flags(so, ov, ca), Nikunj A Dadhania, 2017/02/23
- Re: [Qemu-ppc] [PATCH v4 06/15] target/ppc: remove xer split-out flags(so, ov, ca), Richard Henderson, 2017/02/23
- Re: [Qemu-ppc] [PATCH v4 06/15] target/ppc: remove xer split-out flags(so, ov, ca), Nikunj A Dadhania, 2017/02/23
- Re: [Qemu-ppc] [PATCH v4 06/15] target/ppc: remove xer split-out flags(so, ov, ca), David Gibson, 2017/02/23
- Re: [Qemu-ppc] [PATCH v4 06/15] target/ppc: remove xer split-out flags(so, ov, ca), Richard Henderson, 2017/02/24
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v4 06/15] target/ppc: remove xer split-out flags(so, ov, ca), Nikunj A Dadhania, 2017/02/24
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v4 06/15] target/ppc: remove xer split-out flags(so, ov, ca), Nikunj A Dadhania, 2017/02/24
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v4 06/15] target/ppc: remove xer split-out flags(so, ov, ca), Richard Henderson, 2017/02/24
[Qemu-ppc] [PATCH v4 15/15] target/ppc: add mcrxrx instruction, Nikunj A Dadhania, 2017/02/23
[Qemu-ppc] [PATCH v4 14/15] target/ppc: use tcg ops for neg instruction,
Nikunj A Dadhania <=
[Qemu-ppc] [PATCH v4 10/15] target/ppc: add gen_op_update_ov_isa300(), Nikunj A Dadhania, 2017/02/23
[Qemu-ppc] [PATCH v4 04/15] target/ppc: add gen_op_update_ca_legacy() helper, Nikunj A Dadhania, 2017/02/23
Re: [Qemu-ppc] [PATCH v4 00/15] POWER9 TCG enablements - part15, David Gibson, 2017/02/24