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[Qemu-ppc] [PATCH v5 3/9] ppc/xics: add a realize() handler to ICPStateC
From: |
Cédric Le Goater |
Subject: |
[Qemu-ppc] [PATCH v5 3/9] ppc/xics: add a realize() handler to ICPStateClass |
Date: |
Mon, 3 Apr 2017 09:45:59 +0200 |
It will be used by derived classes in PowerNV for customization.
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: David Gibson <address@hidden>
---
hw/intc/xics.c | 5 +++++
include/hw/ppc/xics.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index d4428b41b03a..292fffecd376 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -337,6 +337,7 @@ static void icp_reset(void *dev)
static void icp_realize(DeviceState *dev, Error **errp)
{
ICPState *icp = ICP(dev);
+ ICPStateClass *icpc = ICP_GET_CLASS(dev);
Object *obj;
Error *err = NULL;
@@ -349,6 +350,10 @@ static void icp_realize(DeviceState *dev, Error **errp)
icp->xics = XICS_FABRIC(obj);
+ if (icpc->realize) {
+ icpc->realize(dev, errp);
+ }
+
qemu_register_reset(icp_reset, dev);
}
diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index 88e0f021b168..05bb10a4ce8f 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -60,6 +60,7 @@ typedef struct XICSFabric XICSFabric;
struct ICPStateClass {
DeviceClass parent_class;
+ void (*realize)(DeviceState *dev, Error **errp);
void (*pre_save)(ICPState *s);
int (*post_load)(ICPState *s, int version_id);
void (*cpu_setup)(ICPState *icp, PowerPCCPU *cpu);
--
2.7.4
- [Qemu-ppc] [PATCH v5 0/9] ppc/pnv: interrupt controller (POWER8), Cédric Le Goater, 2017/04/03
- [Qemu-ppc] [PATCH v5 1/9] spapr: move the IRQ server number mapping under the machine, Cédric Le Goater, 2017/04/03
- [Qemu-ppc] [PATCH v5 2/9] spapr: allocate the ICPState object from under sPAPRCPUCore, Cédric Le Goater, 2017/04/03
- [Qemu-ppc] [PATCH v5 3/9] ppc/xics: add a realize() handler to ICPStateClass,
Cédric Le Goater <=
- [Qemu-ppc] [PATCH v5 4/9] ppc/pnv: add a PnvICPState object, Cédric Le Goater, 2017/04/03
- [Qemu-ppc] [PATCH v5 5/9] ppc/pnv: extend the machine with a XICSFabric interface, Cédric Le Goater, 2017/04/03
- [Qemu-ppc] [PATCH v5 7/9] ppc/pnv: create the ICP object under PnvCore, Cédric Le Goater, 2017/04/03
- [Qemu-ppc] [PATCH v5 6/9] ppc/pnv: extend the machine with a InterruptStatsProvider interface, Cédric Le Goater, 2017/04/03
- [Qemu-ppc] [PATCH v5 8/9] ppc/pnv: add a helper to calculate MMIO addresses registers, Cédric Le Goater, 2017/04/03
- [Qemu-ppc] [PATCH v5 9/9] ppc/pnv: add memory regions for the ICP registers, Cédric Le Goater, 2017/04/03
- Re: [Qemu-ppc] [PATCH v5 0/9] ppc/pnv: interrupt controller (POWER8), David Gibson, 2017/04/05