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[Qemu-ppc] [PULL 22/47] ppc/pnv: extend the machine with a XICSFabric in
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 22/47] ppc/pnv: extend the machine with a XICSFabric interface |
Date: |
Mon, 24 Apr 2017 11:59:02 +1000 |
From: Cédric Le Goater <address@hidden>
A XICSFabric QOM interface is used by the XICS layer to manipulate the
ICP and ICS objects. Let's define the associated handlers for the
PowerNV machine. All handlers should be defined even if there is no
ICS under the PowerNV machine yet.
Signed-off-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/pnv.c | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index aad7917..0a0cfe3 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -34,6 +34,7 @@
#include "qemu/cutils.h"
#include "qapi/visitor.h"
+#include "hw/ppc/xics.h"
#include "hw/ppc/pnv_xscom.h"
#include "hw/isa/isa.h"
@@ -738,6 +739,29 @@ static const TypeInfo pnv_chip_info = {
.abstract = true,
};
+static PowerPCCPU *ppc_get_vcpu_by_pir(int pir)
+{
+ CPUState *cs;
+
+ CPU_FOREACH(cs) {
+ PowerPCCPU *cpu = POWERPC_CPU(cs);
+ CPUPPCState *env = &cpu->env;
+
+ if (env->spr_cb[SPR_PIR].default_value == pir) {
+ return cpu;
+ }
+ }
+
+ return NULL;
+}
+
+static ICPState *pnv_icp_get(XICSFabric *xi, int pir)
+{
+ PowerPCCPU *cpu = ppc_get_vcpu_by_pir(pir);
+
+ return cpu ? ICP(cpu->intc) : NULL;
+}
+
static void pnv_get_num_chips(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
@@ -788,6 +812,7 @@ static void powernv_machine_class_props_init(ObjectClass
*oc)
static void powernv_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
+ XICSFabricClass *xic = XICS_FABRIC_CLASS(oc);
mc->desc = "IBM PowerNV (Non-Virtualized)";
mc->init = ppc_powernv_init;
@@ -798,6 +823,7 @@ static void powernv_machine_class_init(ObjectClass *oc,
void *data)
mc->no_parallel = 1;
mc->default_boot_order = NULL;
mc->default_ram_size = 1 * G_BYTE;
+ xic->icp_get = pnv_icp_get;
powernv_machine_class_props_init(oc);
}
@@ -808,6 +834,10 @@ static const TypeInfo powernv_machine_info = {
.instance_size = sizeof(PnvMachineState),
.instance_init = powernv_machine_initfn,
.class_init = powernv_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_XICS_FABRIC },
+ { },
+ },
};
static void powernv_machine_register_types(void)
--
2.9.3
- [Qemu-ppc] [PULL 43/47] ppc/pnv: generate an OEM SEL event on shutdown, (continued)
- [Qemu-ppc] [PULL 43/47] ppc/pnv: generate an OEM SEL event on shutdown, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 30/47] ipmi: use a file to load SDRs, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 32/47] ipmi: introduce an ipmi_bmc_sdr_find() API, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 27/47] ppc/pnv: Add cut down PSI bridge model and hookup external interrupt, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 45/47] target/ppc: Flush TLB on write to PIDR, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 19/47] spapr: allocate the ICPState object from under sPAPRCPUCore, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 17/47] ppc/xics: introduce an 'intc' backlink under PowerPCCPU, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 25/47] ppc/pnv: add a helper to calculate MMIO addresses registers, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 26/47] ppc/pnv: add memory regions for the ICP registers, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 44/47] spapr-cpu-core: Release ICPState object during CPU unrealization, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 22/47] ppc/pnv: extend the machine with a XICSFabric interface,
David Gibson <=
- [Qemu-ppc] [PULL 41/47] ppc/pnv: populate device tree for IPMI BT devices, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 35/47] spapr: remove the 'nr_servers' field from the machine, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 38/47] ppc/pnv: scan ISA bus to populate device tree, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 37/47] ppc/pnv: enable only one LPC bus, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 46/47] e500, book3s: mfspr 259: Register mapped/aliased SPRG3 user read, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 34/47] target/ppc: Fix size of struct PPCElfPrstatus, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 31/47] ipmi: provide support for FRUs, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 39/47] ppc/pnv: populate device tree for RTC devices, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 36/47] ppc/pnv: Add support for POWER8+ LPC Controller, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 47/47] target/ppc: Style fixes, David Gibson, 2017/04/23