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Re: [Qemu-ppc] [PATCH v7 15/19] spapr/xive: enable XIVE MMIOs at reset
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH v7 15/19] spapr/xive: enable XIVE MMIOs at reset |
Date: |
Tue, 11 Dec 2018 12:47:37 +1100 |
User-agent: |
Mutt/1.10.1 (2018-07-13) |
On Sun, Dec 09, 2018 at 08:46:06PM +0100, Cédric Le Goater wrote:
> Depending on the interrupt mode chosen, enable or disable the XIVE
> MMIOs.
>
> Signed-off-by: Cédric Le Goater <address@hidden>
> ---
> include/hw/ppc/spapr_xive.h | 1 +
> hw/intc/spapr_xive.c | 9 +++++++++
> hw/ppc/spapr_irq.c | 8 ++++++++
> 3 files changed, 18 insertions(+)
>
> diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h
> index 7244a6231ce6..308afb61a666 100644
> --- a/include/hw/ppc/spapr_xive.h
> +++ b/include/hw/ppc/spapr_xive.h
> @@ -48,5 +48,6 @@ void spapr_xive_hcall_init(sPAPRMachineState *spapr);
> void spapr_dt_xive(sPAPRMachineState *spapr, uint32_t nr_servers, void *fdt,
> uint32_t phandle);
> void spapr_xive_reset_tctx(sPAPRXive *xive);
> +void spapr_xive_enable_mmio(sPAPRXive *xive, bool enable);
>
> #endif /* PPC_SPAPR_XIVE_H */
> diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
> index 560d8d031f74..c6dbb2e8cfc7 100644
> --- a/hw/intc/spapr_xive.c
> +++ b/hw/intc/spapr_xive.c
> @@ -179,6 +179,15 @@ static void spapr_xive_map_mmio(sPAPRXive *xive)
> sysbus_mmio_map(SYS_BUS_DEVICE(xive), 2, xive->tm_base);
> }
>
> +void spapr_xive_enable_mmio(sPAPRXive *xive, bool enable)
The logic looks fine, but I dislike this name - it's called
..._enable() when it can also be used to disable.
> +{
> + memory_region_set_enabled(&xive->source.esb_mmio, enable);
> + memory_region_set_enabled(&xive->tm_mmio, enable);
> +
> + /* Disable the END ESBs until a guest OS makes use of them */
> + memory_region_set_enabled(&xive->end_source.esb_mmio, false);
> +}
> +
> /*
> * When a Virtual Processor is scheduled to run on a HW thread, the
> * hypervisor pushes its identifier in the OS CAM line. Emulate the
> diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
> index b423cee30e2c..a8e50725397c 100644
> --- a/hw/ppc/spapr_irq.c
> +++ b/hw/ppc/spapr_irq.c
> @@ -217,6 +217,11 @@ static void spapr_irq_reset_xics(sPAPRMachineState
> *spapr, Error **errp)
> CPU_FOREACH(cs) {
> spapr_cpu_core_set_intc(POWERPC_CPU(cs), spapr->icp_type);
> }
> +
> + /* Deactivate the XIVE MMIOs */
> + if (spapr->xive) {
> + spapr_xive_enable_mmio(spapr->xive, false);
> + }
> }
>
> #define SPAPR_IRQ_XICS_NR_IRQS 0x1000
> @@ -358,6 +363,9 @@ static void spapr_irq_reset_xive(sPAPRMachineState
> *spapr, Error **errp)
> * to come after the XiveTCTX reset handlers.
> */
> spapr_xive_reset_tctx(spapr->xive);
> +
> + /* Activate the XIVE MMIOs */
> + spapr_xive_enable_mmio(spapr->xive, true);
> }
>
> /*
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- Re: [Qemu-ppc] [PATCH v7 12/19] spapr: add a 'reset' method to the sPAPR IRQ backend, (continued)
- [Qemu-ppc] [PATCH v7 11/19] spapr: extend the sPAPR IRQ backend for XICS migration, Cédric Le Goater, 2018/12/09
- [Qemu-ppc] [PATCH v7 08/19] spapr: add hcalls support for the XIVE exploitation interrupt mode, Cédric Le Goater, 2018/12/09
- [Qemu-ppc] [PATCH v7 10/19] spapr: allocate the interrupt thread context under the CPU core, Cédric Le Goater, 2018/12/09
- [Qemu-ppc] [PATCH v7 07/19] spapr: introduce a new machine IRQ backend for XIVE, Cédric Le Goater, 2018/12/09
- [Qemu-ppc] [PATCH v7 15/19] spapr/xive: enable XIVE MMIOs at reset, Cédric Le Goater, 2018/12/09
- Re: [Qemu-ppc] [PATCH v7 15/19] spapr/xive: enable XIVE MMIOs at reset,
David Gibson <=
- [Qemu-ppc] [PATCH v7 13/19] spapr: add an extra OV5 field to the sPAPR IRQ backend, Cédric Le Goater, 2018/12/09
- [Qemu-ppc] [PATCH v7 14/19] spapr: set the interrupt presenter at reset, Cédric Le Goater, 2018/12/09
- [Qemu-ppc] [PATCH v7 16/19] spapr: introduce a new sPAPR IRQ backend supporting XIVE and XICS, Cédric Le Goater, 2018/12/09