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[Qemu-ppc] [PULL 39/40] spapr: change default CPU type to POWER9
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 39/40] spapr: change default CPU type to POWER9 |
Date: |
Fri, 21 Dec 2018 16:46:05 +1100 |
From: Cédric Le Goater <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 65c6065602..19a07c5c9d 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -3931,7 +3931,7 @@ static void spapr_machine_class_init(ObjectClass *oc,
void *data)
hc->unplug = spapr_machine_device_unplug;
smc->dr_lmb_enabled = true;
- mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0");
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power9_v2.0");
mc->has_hotpluggable_cpus = true;
smc->resize_hpt_default = SPAPR_RESIZE_HPT_ENABLED;
fwc->get_dev_path = spapr_get_fw_dev_path;
@@ -4028,6 +4028,7 @@ static void spapr_machine_3_1_class_options(MachineClass
*mc)
{
spapr_machine_4_0_class_options(mc);
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_3_1);
+ mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0");
}
DEFINE_SPAPR_MACHINE(3_1, "3.1", false);
--
2.19.2
- [Qemu-ppc] [PULL 25/40] ppc/xive: introduce the XIVE interrupt thread context, (continued)
- [Qemu-ppc] [PULL 25/40] ppc/xive: introduce the XIVE interrupt thread context, David Gibson, 2018/12/21
- [Qemu-ppc] [PULL 27/40] ppc/xive: notify the CPU when the interrupt priority is more privileged, David Gibson, 2018/12/21
- [Qemu-ppc] [PULL 28/40] spapr/xive: introduce a XIVE interrupt controller, David Gibson, 2018/12/21
- [Qemu-ppc] [PULL 26/40] ppc/xive: introduce a simplified XIVE presenter, David Gibson, 2018/12/21
- [Qemu-ppc] [PULL 30/40] spapr-iommu: Always advertise the maximum possible DMA window size, David Gibson, 2018/12/21
- [Qemu-ppc] [PULL 29/40] spapr/xive: use the VCPU id as a NVT identifier, David Gibson, 2018/12/21
- [Qemu-ppc] [PULL 33/40] spapr: add device tree support for the XIVE exploitation mode, David Gibson, 2018/12/21
- [Qemu-ppc] [PULL 32/40] spapr: add hcalls support for the XIVE exploitation interrupt mode, David Gibson, 2018/12/21
- [Qemu-ppc] [PULL 31/40] spapr: introduce a new machine IRQ backend for XIVE, David Gibson, 2018/12/21
- [Qemu-ppc] [PULL 36/40] spapr: add a 'reset' method to the sPAPR IRQ backend, David Gibson, 2018/12/21
- [Qemu-ppc] [PULL 39/40] spapr: change default CPU type to POWER9,
David Gibson <=
- [Qemu-ppc] [PULL 37/40] spapr: add an extra OV5 field to the sPAPR IRQ backend, David Gibson, 2018/12/21
- [Qemu-ppc] [PULL 40/40] MAINTAINERS: PPC: add a XIVE section, David Gibson, 2018/12/21
- [Qemu-ppc] [PULL 35/40] spapr: extend the sPAPR IRQ backend for XICS migration, David Gibson, 2018/12/21
- [Qemu-ppc] [PULL 38/40] spapr: introduce an 'ic-mode' machine option, David Gibson, 2018/12/21
- Re: [Qemu-ppc] [PULL 00/40] ppc-for-4.0 queue 20181221, Peter Maydell, 2018/12/21
- Re: [Qemu-ppc] [Qemu-devel] [PULL 00/40] ppc-for-4.0 queue 20181221, no-reply, 2018/12/26