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[Qemu-ppc] [PULL 07/37] sam460ex: Fix support for memory larger than 1GB
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 07/37] sam460ex: Fix support for memory larger than 1GB |
Date: |
Mon, 4 Feb 2019 20:00:54 +1100 |
From: BALATON Zoltan <address@hidden>
Fix the encoding of larger memory modules in the SoC registers which
allows specifying more than 1GB memory for sam460ex. Well, only 2GB
due to SoC and firmware restrictions which was the only missing value
compared to what the real hardware supports. The SoC should support up
to 4GB but when setting that the firmware hangs during memory test.
This may be an overflow bug in the firmware which I did not try to
debug but this may affect real hardware as well.
Signed-off-by: BALATON Zoltan <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/ppc440_uc.c | 22 ++++++++++++----------
hw/ppc/sam460ex.c | 6 ++++--
2 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index 60dbb35eee..c489368905 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -2,7 +2,7 @@
* QEMU PowerPC 440 embedded processors emulation
*
* Copyright (c) 2012 François Revol
- * Copyright (c) 2016-2018 BALATON Zoltan
+ * Copyright (c) 2016-2019 BALATON Zoltan
*
* This work is licensed under the GNU GPL license version 2 or later.
*
@@ -505,10 +505,6 @@ enum {
SDRAM_PLBADDUHB = 0x50,
};
-/* XXX: TOFIX: some patches have made this code become inconsistent:
- * there are type inconsistencies, mixing hwaddr, target_ulong
- * and uint32_t
- */
static uint32_t sdram_bcr(hwaddr ram_base, hwaddr ram_size)
{
uint32_t bcr;
@@ -538,11 +534,17 @@ static uint32_t sdram_bcr(hwaddr ram_base, hwaddr
ram_size)
case (1 * GiB):
bcr = 0xe000;
break;
+ case (2 * GiB):
+ bcr = 0xc000;
+ break;
+ case (4 * GiB):
+ bcr = 0x8000;
+ break;
default:
error_report("invalid RAM size " TARGET_FMT_plx, ram_size);
return 0;
}
- bcr |= ram_base & 0xFF800000;
+ bcr |= ram_base >> 2 & 0xffe00000;
bcr |= 1;
return bcr;
@@ -550,12 +552,12 @@ static uint32_t sdram_bcr(hwaddr ram_base, hwaddr
ram_size)
static inline hwaddr sdram_base(uint32_t bcr)
{
- return bcr & 0xFF800000;
+ return (bcr & 0xffe00000) << 2;
}
-static target_ulong sdram_size(uint32_t bcr)
+static uint64_t sdram_size(uint32_t bcr)
{
- target_ulong size;
+ uint64_t size;
int sh;
sh = 1024 - ((bcr >> 6) & 0x3ff);
@@ -575,7 +577,7 @@ static void sdram_set_bcr(ppc440_sdram_t *sdram, int i,
&sdram->ram_memories[i]);
object_unparent(OBJECT(&sdram->containers[i]));
}
- sdram->bcr[i] = bcr & 0xFFDEE001;
+ sdram->bcr[i] = bcr & 0xffe0ffc1;
if (enabled && (bcr & 1)) {
memory_region_init(&sdram->containers[i], NULL, "sdram-containers",
sdram_size(bcr));
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index 7a8c745021..202ed14bcf 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -76,9 +76,11 @@
#define UART_FREQ 11059200
#define SDRAM_NR_BANKS 4
-/* FIXME: See u-boot.git 8ac41e, also fix in ppc440_uc.c */
+/* The SoC could also handle 4 GiB but firmware does not work with that. */
+/* Maybe it overflows a signed 32 bit number somewhere? */
static const ram_addr_t ppc460ex_sdram_bank_sizes[] = {
- 1 * GiB, 512 * MiB, 256 * MiB, 128 * MiB, 64 * MiB, 32 * MiB, 0
+ 2 * GiB, 1 * GiB, 512 * MiB, 256 * MiB, 128 * MiB, 64 * MiB,
+ 32 * MiB, 0
};
struct boot_info {
--
2.20.1
- [Qemu-ppc] [PULL 32/37] target/ppc: remove ROTRu32 and ROTRu64 macros from int_helper.c, (continued)
- [Qemu-ppc] [PULL 32/37] target/ppc: remove ROTRu32 and ROTRu64 macros from int_helper.c, David Gibson, 2019/02/04
- [Qemu-ppc] [PULL 26/37] hw/ppc/spapr: Add support for "-vga cirrus", David Gibson, 2019/02/04
- [Qemu-ppc] [PULL 16/37] ppc/pnv: introduce a CPU machine_data, David Gibson, 2019/02/04
- [Qemu-ppc] [PULL 34/37] spapr_pci: Fix endianness in assigned-addresses property, David Gibson, 2019/02/04
- [Qemu-ppc] [PULL 31/37] target/ppc: simplify VEXT_SIGNED macro in int_helper.c, David Gibson, 2019/02/04
- [Qemu-ppc] [PULL 29/37] target/ppc: eliminate use of HI_IDX and LO_IDX macros from int_helper.c, David Gibson, 2019/02/04
- [Qemu-ppc] [PULL 33/37] target/ppc: remove various HOST_WORDS_BIGENDIAN hacks in int_helper.c, David Gibson, 2019/02/04
- [Qemu-ppc] [PULL 30/37] target/ppc: eliminate use of EL_IDX macros from int_helper.c, David Gibson, 2019/02/04
- [Qemu-ppc] [PULL 35/37] hw/ppc: Don't include m48t59.h if it is not necessary, David Gibson, 2019/02/04
- [Qemu-ppc] [PULL 36/37] mmap-alloc: unfold qemu_ram_mmap(), David Gibson, 2019/02/04
- [Qemu-ppc] [PULL 07/37] sam460ex: Fix support for memory larger than 1GB,
David Gibson <=
- Re: [Qemu-ppc] [PULL 00/37] ppc-for-4.0 queue 20190204, Peter Maydell, 2019/02/04
- [Qemu-ppc] [PULL 01/37] pseries: Update SLOF firmware image, David Gibson, 2019/02/04