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Re: [Qemu-ppc] [PATCH 13/27] ppc/pnv: psi: add a reset handler
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH 13/27] ppc/pnv: psi: add a reset handler |
Date: |
Thu, 7 Mar 2019 14:32:09 +1100 |
User-agent: |
Mutt/1.11.3 (2019-02-01) |
On Wed, Mar 06, 2019 at 09:50:18AM +0100, Cédric Le Goater wrote:
> Reset all regs but keep the MMIO BAR enabled as it is at realize time.
>
> Signed-off-by: Cédric Le Goater <address@hidden>
Again, I don't like the duplication of information between psi->reg
and psi->bar. But that's out of scope for this patch, so, applied.
> ---
> hw/ppc/pnv_psi.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c
> index a2f8d0dece80..e61861bfd3c6 100644
> --- a/hw/ppc/pnv_psi.c
> +++ b/hw/ppc/pnv_psi.c
> @@ -442,6 +442,15 @@ static const MemoryRegionOps pnv_psi_xscom_ops = {
> }
> };
>
> +static void pnv_psi_reset(void *dev)
> +{
> + PnvPsi *psi = PNV_PSI(dev);
> +
> + memset(psi->regs, 0x0, sizeof(psi->regs));
> +
> + psi->regs[PSIHB_XSCOM_BAR] = psi->bar | PSIHB_BAR_EN;
> +}
> +
> static void pnv_psi_init(Object *obj)
> {
> PnvPsi *psi = PNV_PSI(obj);
> @@ -511,6 +520,8 @@ static void pnv_psi_realize(DeviceState *dev, Error
> **errp)
> psi->regs[xivr] = PSIHB_XIVR_PRIO_MSK |
> ((uint64_t) i << PSIHB_XIVR_SRC_SH);
> }
> +
> + qemu_register_reset(pnv_psi_reset, dev);
> }
>
> static int pnv_psi_dt_xscom(PnvXScomInterface *dev, void *fdt, int
> xscom_offset)
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [Qemu-ppc] [PATCH 24/27] ppc/pnv: activate XSCOM tests for POWER9, (continued)
- [Qemu-ppc] [PATCH 24/27] ppc/pnv: activate XSCOM tests for POWER9, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 27/27] target/ppc: add HV support for POWER9, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 22/27] ppc/pnv: extend XSCOM core support for POWER9, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 16/27] ppc/pnv: lpc: fix OPB address ranges, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 14/27] ppc/pnv: add a PSI bridge model class, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 13/27] ppc/pnv: psi: add a reset handler, Cédric Le Goater, 2019/03/06
- Re: [Qemu-ppc] [PATCH 13/27] ppc/pnv: psi: add a reset handler,
David Gibson <=
- [Qemu-ppc] [PATCH 20/27] ppc/pnv: add a OCC model class, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 18/27] ppc/pnv: add a LPC Controller model for POWER9, Cédric Le Goater, 2019/03/06
[Qemu-ppc] [PATCH 08/27] ppc/pnv: introduce a new pic_print_info() operation to the chip model, Cédric Le Goater, 2019/03/06
[Qemu-ppc] [PATCH 26/27] ppc/pnv: add a "ibm, opal/power-mgt" device tree node on POWER9, Cédric Le Goater, 2019/03/06