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[PULL 83/88] ppc/pnv: Pass XSCOM base address and address size to pnv_dt
From: |
David Gibson |
Subject: |
[PULL 83/88] ppc/pnv: Pass XSCOM base address and address size to pnv_dt_xscom() |
Date: |
Tue, 17 Dec 2019 15:43:17 +1100 |
From: Greg Kurz <address@hidden>
Since pnv_dt_xscom() is called from chip specific dt_populate() hooks,
it shouldn't have to guess the chip type in order to populate the "reg"
property. Just pass the base address and address size as arguments.
Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/pnv.c | 12 +++++++++---
hw/ppc/pnv_xscom.c | 16 +++-------------
include/hw/ppc/pnv_xscom.h | 3 ++-
3 files changed, 14 insertions(+), 17 deletions(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 16f4e407ee..c0a5703b74 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -282,7 +282,9 @@ static void pnv_chip_power8_dt_populate(PnvChip *chip, void
*fdt)
{
int i;
- pnv_dt_xscom(chip, fdt, 0);
+ pnv_dt_xscom(chip, fdt, 0,
+ cpu_to_be64(PNV_XSCOM_BASE(chip)),
+ cpu_to_be64(PNV_XSCOM_SIZE));
for (i = 0; i < chip->nr_cores; i++) {
PnvCore *pnv_core = chip->cores[i];
@@ -302,7 +304,9 @@ static void pnv_chip_power9_dt_populate(PnvChip *chip, void
*fdt)
{
int i;
- pnv_dt_xscom(chip, fdt, 0);
+ pnv_dt_xscom(chip, fdt, 0,
+ cpu_to_be64(PNV9_XSCOM_BASE(chip)),
+ cpu_to_be64(PNV9_XSCOM_SIZE));
for (i = 0; i < chip->nr_cores; i++) {
PnvCore *pnv_core = chip->cores[i];
@@ -321,7 +325,9 @@ static void pnv_chip_power10_dt_populate(PnvChip *chip,
void *fdt)
{
int i;
- pnv_dt_xscom(chip, fdt, 0);
+ pnv_dt_xscom(chip, fdt, 0,
+ cpu_to_be64(PNV10_XSCOM_BASE(chip)),
+ cpu_to_be64(PNV10_XSCOM_SIZE));
for (i = 0; i < chip->nr_cores; i++) {
PnvCore *pnv_core = chip->cores[i];
diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
index df926003f2..8189767eb0 100644
--- a/hw/ppc/pnv_xscom.c
+++ b/hw/ppc/pnv_xscom.c
@@ -286,24 +286,14 @@ static const char compat_p8[] =
"ibm,power8-xscom\0ibm,xscom";
static const char compat_p9[] = "ibm,power9-xscom\0ibm,xscom";
static const char compat_p10[] = "ibm,power10-xscom\0ibm,xscom";
-int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset)
+int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset,
+ uint64_t xscom_base, uint64_t xscom_size)
{
- uint64_t reg[2];
+ uint64_t reg[] = { xscom_base, xscom_size };
int xscom_offset;
ForeachPopulateArgs args;
char *name;
- if (pnv_chip_is_power10(chip)) {
- reg[0] = cpu_to_be64(PNV10_XSCOM_BASE(chip));
- reg[1] = cpu_to_be64(PNV10_XSCOM_SIZE);
- } else if (pnv_chip_is_power9(chip)) {
- reg[0] = cpu_to_be64(PNV9_XSCOM_BASE(chip));
- reg[1] = cpu_to_be64(PNV9_XSCOM_SIZE);
- } else {
- reg[0] = cpu_to_be64(PNV_XSCOM_BASE(chip));
- reg[1] = cpu_to_be64(PNV_XSCOM_SIZE);
- }
-
name = g_strdup_printf("xscom@%" PRIx64, be64_to_cpu(reg[0]));
xscom_offset = fdt_add_subnode(fdt, root_offset, name);
_FDT(xscom_offset);
diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h
index 2bdb7ae84f..ad53f788b4 100644
--- a/include/hw/ppc/pnv_xscom.h
+++ b/include/hw/ppc/pnv_xscom.h
@@ -114,7 +114,8 @@ typedef struct PnvXScomInterfaceClass {
#define PNV10_XSCOM_PSIHB_SIZE 0x100
void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp);
-int pnv_dt_xscom(PnvChip *chip, void *fdt, int offset);
+int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset,
+ uint64_t xscom_base, uint64_t xscom_size);
void pnv_xscom_add_subregion(PnvChip *chip, hwaddr offset,
MemoryRegion *mr);
--
2.23.0
- [PULL 59/88] ppc: Ignore the CPU_INTERRUPT_EXITTB interrupt with KVM, (continued)
- [PULL 59/88] ppc: Ignore the CPU_INTERRUPT_EXITTB interrupt with KVM, David Gibson, 2019/12/16
- [PULL 70/88] ppc/pnv: Loop on the whole hierarchy to populate the DT with the XSCOM nodes, David Gibson, 2019/12/16
- [PULL 63/88] ppc/psi: cleanup definitions, David Gibson, 2019/12/16
- [PULL 68/88] target/ppc: Add SPR ASDR, David Gibson, 2019/12/16
- [PULL 61/88] target/ppc: Add POWER10 DD1.0 model information, David Gibson, 2019/12/16
- [PULL 75/88] ppc: Drop useless extern annotation for functions, David Gibson, 2019/12/16
- [PULL 62/88] ppc/pnv: Introduce a POWER10 PnvChip and a powernv10 machine, David Gibson, 2019/12/16
- [PULL 71/88] ppc/pnv: populate the DT with realized XSCOM devices, David Gibson, 2019/12/16
- [PULL 66/88] target/ppc: Implement the VTB for HV access, David Gibson, 2019/12/16
- [PULL 67/88] target/ppc: Work [S]PURR implementation and add HV support, David Gibson, 2019/12/16
- [PULL 83/88] ppc/pnv: Pass XSCOM base address and address size to pnv_dt_xscom(),
David Gibson <=
- [PULL 81/88] ppc/pnv: Introduce PnvChipClass::intc_print_info() method, David Gibson, 2019/12/16
- [PULL 74/88] ppc/pnv: Fix OCC common area region mapping, David Gibson, 2019/12/16
- [PULL 72/88] ppc/pnv: Make PnvXScomInterface an incomplete type, David Gibson, 2019/12/16
- [PULL 80/88] ppc/pnv: Drop pnv_is_power9() and pnv_is_power10() helpers, David Gibson, 2019/12/16
- [PULL 76/88] ppc/pnv: Introduce PnvPsiClass::compat, David Gibson, 2019/12/16
- [PULL 77/88] ppc/pnv: Drop PnvPsiClass::chip_type, David Gibson, 2019/12/16
- [PULL 84/88] ppc/pnv: Pass content of the "compatible" property to pnv_dt_xscom(), David Gibson, 2019/12/16
- [PULL 82/88] ppc/pnv: Introduce PnvChipClass::xscom_core_base() method, David Gibson, 2019/12/16
- [PULL 78/88] ppc/pnv: Introduce PnvMachineClass and PnvMachineClass::compat, David Gibson, 2019/12/16
- [PULL 79/88] ppc/pnv: Introduce PnvMachineClass::dt_power_mgt(), David Gibson, 2019/12/16