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[PATCH v2 5/7] fix the prototype of muls64/mulu64
From: |
Lijun Pan |
Subject: |
[PATCH v2 5/7] fix the prototype of muls64/mulu64 |
Date: |
Wed, 17 Jun 2020 19:11:25 -0500 |
The prototypes of muls64/mulu64 in host-utils.h should match the
definitions in host-utils.c
Signed-off-by: Lijun Pan <ljp@linux.ibm.com>
---
v2: no change
include/qemu/host-utils.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/qemu/host-utils.h b/include/qemu/host-utils.h
index 4cd170e6cd..cdca2991d8 100644
--- a/include/qemu/host-utils.h
+++ b/include/qemu/host-utils.h
@@ -77,8 +77,8 @@ static inline int divs128(int64_t *plow, int64_t *phigh,
int64_t divisor)
}
}
#else
-void muls64(uint64_t *phigh, uint64_t *plow, int64_t a, int64_t b);
-void mulu64(uint64_t *phigh, uint64_t *plow, uint64_t a, uint64_t b);
+void muls64(uint64_t *plow, uint64_t *phigh, int64_t a, int64_t b);
+void mulu64(uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b);
int divu128(uint64_t *plow, uint64_t *phigh, uint64_t divisor);
int divs128(int64_t *plow, int64_t *phigh, int64_t divisor);
--
2.23.0
- [PATCH v2 0/7] Add several Power ISA 3.1 32/64-bit vector instructions, Lijun Pan, 2020/06/17
- [PATCH v2 3/7] target/ppc: add vmulld instruction, Lijun Pan, 2020/06/17
- [PATCH v2 1/7] target/ppc: Introduce Power ISA 3.1 flag, Lijun Pan, 2020/06/17
- [PATCH v2 2/7] target/ppc: add byte-reverse br[dwh] instructions, Lijun Pan, 2020/06/17
- [PATCH v2 5/7] fix the prototype of muls64/mulu64,
Lijun Pan <=
- [PATCH v2 7/7] target/ppc: add vdiv{su}{wd} vmod{su}{wd} instructions, Lijun Pan, 2020/06/17
- [PATCH v2 6/7] target/ppc: add vmulh{su}d instructions, Lijun Pan, 2020/06/17
- [PATCH v2 4/7] target/ppc: add vmulh{su}w instructions, Lijun Pan, 2020/06/17
- Re: [PATCH v2 0/7] Add several Power ISA 3.1 32/64-bit vector instructions, no-reply, 2020/06/17