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[PATCH v2 16/16] target/ppc/power8_pmu.c: handle overflow bits when PMU
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH v2 16/16] target/ppc/power8_pmu.c: handle overflow bits when PMU is running |
Date: |
Tue, 24 Aug 2021 13:30:32 -0300 |
Up until this moment we were assuming that the counter negative
enabled bits, PMC1CE and PMCjCE, would never be changed when the
PMU is already started.
Turns out that there is no such restriction in the PowerISA v3.1,
and software can enable/disable overflow conditions of the counters
at any time.
To support this scenario, track the overflow bits state when a
write in MMCR0 is made in which the run state of the PMU (MMCR0_FC
bit) didn't change and, if some overflow bit were changed in the
middle of a cycle count session, restart it.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
target/ppc/power8_pmu.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/target/ppc/power8_pmu.c b/target/ppc/power8_pmu.c
index d235cc2b53..e02986f18a 100644
--- a/target/ppc/power8_pmu.c
+++ b/target/ppc/power8_pmu.c
@@ -340,6 +340,30 @@ void helper_store_mmcr0(CPUPPCState *env, target_ulong
value)
} else {
start_cycle_count_session(env);
}
+ } else {
+ /*
+ * No change in MMCR0_FC state, but if the PMU is running and
+ * a change in the counter negative overflow bits is made,
+ * we need to restart a new cycle count session to restart
+ * the appropriate overflow timers.
+ */
+ if (curr_FC) {
+ return;
+ }
+
+ bool pmc1ce_curr = curr_value & MMCR0_PMC1CE;
+ bool pmc1ce_new = value & MMCR0_PMC1CE;
+ bool pmcjce_curr = curr_value & MMCR0_PMCjCE;
+ bool pmcjce_new = value & MMCR0_PMCjCE;
+
+ if (pmc1ce_curr == pmc1ce_new && pmcjce_curr == pmcjce_new) {
+ return;
+ }
+
+ /* Update the counter with the events counted so far */
+ update_cycles_PMCs(env);
+
+ start_cycle_count_session(env);
}
}
--
2.31.1
- Re: [PATCH v2 09/16] PPC64/TCG: Implement 'rfebb' instruction, (continued)
- [PATCH v2 10/16] target/ppc: PMU Event-Based exception support, Daniel Henrique Barboza, 2021/08/24
- [PATCH v2 11/16] target/ppc/excp_helper.c: EBB handling adjustments, Daniel Henrique Barboza, 2021/08/24
- [PATCH v2 12/16] target/ppc/power8_pmu.c: enable PMC1 counter negative overflow, Daniel Henrique Barboza, 2021/08/24
- [PATCH v2 13/16] target/ppc/power8_pmu.c: cycles overflow with all PMCs, Daniel Henrique Barboza, 2021/08/24
- [PATCH v2 14/16] target/ppc: PMU: insns counter negative overflow support, Daniel Henrique Barboza, 2021/08/24
- [PATCH v2 15/16] target/ppc/translate: PMU: handle setting of PMCs while running, Daniel Henrique Barboza, 2021/08/24
- [PATCH v2 16/16] target/ppc/power8_pmu.c: handle overflow bits when PMU is running,
Daniel Henrique Barboza <=