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[PATCH 15/29] tcg_funcs: Add tb_flush to TCGModuleOps
From: |
Gerd Hoffmann |
Subject: |
[PATCH 15/29] tcg_funcs: Add tb_flush to TCGModuleOps |
Date: |
Tue, 31 Aug 2021 14:15:31 +0200 |
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
include/exec/exec-all.h | 1 -
include/tcg/tcg-module.h | 1 +
accel/stubs/tcg-stub.c | 4 ----
accel/tcg/tcg-module.c | 1 +
accel/tcg/translate-all.c | 9 ++++++++-
cpu.c | 2 +-
gdbstub.c | 4 ++--
hw/ppc/spapr_hcall.c | 2 +-
linux-user/mmap.c | 2 +-
linux-user/syscall.c | 4 ++--
plugins/core.c | 2 +-
plugins/loader.c | 2 +-
target/alpha/sys_helper.c | 2 +-
target/riscv/csr.c | 2 +-
14 files changed, 21 insertions(+), 17 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 27fc489c57b5..7dc6f498a7e4 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -572,7 +572,6 @@ void tb_invalidate_phys_range(target_ulong start,
target_ulong end);
#else
void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs);
#endif
-void tb_flush(CPUState *cpu);
void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
target_ulong cs_base, uint32_t flags,
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 5dd4deb9ed57..003581b0718c 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -13,6 +13,7 @@ struct TCGModuleOps {
#endif
void (*tcg_exec_unrealizefn)(CPUState *cpu);
void (*tcg_exec_realizefn)(CPUState *cpu, Error **errp);
+ void (*tb_flush)(CPUState *cpu);
};
extern struct TCGModuleOps tcg;
diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
index d8162673ae8d..e7651d035f28 100644
--- a/accel/stubs/tcg-stub.c
+++ b/accel/stubs/tcg-stub.c
@@ -13,10 +13,6 @@
#include "qemu/osdep.h"
#include "exec/exec-all.h"
-void tb_flush(CPUState *cpu)
-{
-}
-
void tlb_set_dirty(CPUState *cpu, target_ulong vaddr)
{
}
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index 36c1df564f31..7600951fd20b 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -34,4 +34,5 @@ struct TCGModuleOps tcg = {
#endif
.tcg_exec_realizefn = tcg_exec_realizefn_stub,
.tcg_exec_unrealizefn = update_cpu_stub,
+ .tb_flush = update_cpu_stub,
};
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index c7547cd923b4..1d258e89fc81 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1003,7 +1003,7 @@ done:
}
}
-void tb_flush(CPUState *cpu)
+static void tb_flush(CPUState *cpu)
{
if (tcg_enabled()) {
unsigned tb_flush_count = qatomic_mb_read(&tb_ctx.tb_flush_count);
@@ -2463,3 +2463,10 @@ int page_unprotect(target_ulong address, uintptr_t pc)
return 0;
}
#endif /* CONFIG_USER_ONLY */
+
+static void tcg_module_ops_tb(void)
+{
+ tcg.tb_flush = tb_flush;
+}
+
+type_init(tcg_module_ops_tb);
diff --git a/cpu.c b/cpu.c
index d1c9f68a26e7..ce96b3591a9c 100644
--- a/cpu.c
+++ b/cpu.c
@@ -58,7 +58,7 @@ static int cpu_common_post_load(void *opaque, int version_id)
* memory we've translated code from. So we must flush all TBs,
* which will now be stale.
*/
- tb_flush(cpu);
+ tcg.tb_flush(cpu);
return 0;
}
diff --git a/gdbstub.c b/gdbstub.c
index 5d8e6ae3cd9b..c2c6901b77b6 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -2796,7 +2796,7 @@ static void gdb_vm_state_change(void *opaque, bool
running, RunState state)
} else {
trace_gdbstub_hit_break();
}
- tb_flush(cpu);
+ tcg.tb_flush(cpu);
ret = GDB_SIGNAL_TRAP;
break;
case RUN_STATE_PAUSED:
@@ -3135,7 +3135,7 @@ gdb_handlesig(CPUState *cpu, int sig)
/* disable single step if it was enabled */
cpu_single_step(cpu, 0);
- tb_flush(cpu);
+ tcg.tb_flush(cpu);
if (sig != 0) {
snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb(sig));
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 0e9a5b2e4053..732e79cca0ad 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -292,7 +292,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu,
SpaprMachineState *spapr,
if (kvm_enabled()) {
kvmppc_icbi_range(cpu, pdst, len);
} else {
- tb_flush(CPU(cpu));
+ tcg.tb_flush(CPU(cpu));
}
}
diff --git a/linux-user/mmap.c b/linux-user/mmap.c
index 0e103859fed8..85cb03e176c1 100644
--- a/linux-user/mmap.c
+++ b/linux-user/mmap.c
@@ -461,7 +461,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int
target_prot,
CPUState *cpu = thread_cpu;
if (!(cpu->tcg_cflags & CF_PARALLEL)) {
cpu->tcg_cflags |= CF_PARALLEL;
- tb_flush(cpu);
+ tcg.tb_flush(cpu);
}
}
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index ccd3892b2df7..6ab3009bc98b 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -4513,7 +4513,7 @@ static inline abi_ulong do_shmat(CPUArchState *cpu_env,
*/
if (!(cpu->tcg_cflags & CF_PARALLEL)) {
cpu->tcg_cflags |= CF_PARALLEL;
- tb_flush(cpu);
+ tcg.tb_flush(cpu);
}
if (shmaddr)
@@ -6376,7 +6376,7 @@ static int do_fork(CPUArchState *env, unsigned int flags,
abi_ulong newsp,
*/
if (!(cpu->tcg_cflags & CF_PARALLEL)) {
cpu->tcg_cflags |= CF_PARALLEL;
- tb_flush(cpu);
+ tcg.tb_flush(cpu);
}
/* we create a new CPU instance. */
diff --git a/plugins/core.c b/plugins/core.c
index 6b2490f97328..ee3ad26b354c 100644
--- a/plugins/core.c
+++ b/plugins/core.c
@@ -514,7 +514,7 @@ void qemu_plugin_user_exit(void)
}
}
- tb_flush(current_cpu);
+ tcg.tb_flush(current_cpu);
CPU_FOREACH(cpu) {
qemu_plugin_disable_mem_helpers(cpu);
diff --git a/plugins/loader.c b/plugins/loader.c
index 71b03721dffc..21e94a7509dc 100644
--- a/plugins/loader.c
+++ b/plugins/loader.c
@@ -364,7 +364,7 @@ static void plugin_flush_destroy(CPUState *cpu,
run_on_cpu_data arg)
struct qemu_plugin_reset_data *data = arg.host_ptr;
g_assert(cpu_in_exclusive_context(cpu));
- tb_flush(cpu);
+ tcg.tb_flush(cpu);
plugin_reset_destroy(data);
}
diff --git a/target/alpha/sys_helper.c b/target/alpha/sys_helper.c
index 25f6cb88940d..bad37d35e342 100644
--- a/target/alpha/sys_helper.c
+++ b/target/alpha/sys_helper.c
@@ -55,7 +55,7 @@ void helper_tbis(CPUAlphaState *env, uint64_t p)
void helper_tb_flush(CPUAlphaState *env)
{
- tb_flush(env_cpu(env));
+ tcg.tb_flush(env_cpu(env));
}
void helper_halt(uint64_t restart)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 9a4ed18ac597..46603475e57b 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -610,7 +610,7 @@ static RISCVException write_misa(CPURISCVState *env, int
csrno,
/* flush translation cache */
if (val != env->misa) {
- tb_flush(env_cpu(env));
+ tcg.tb_flush(env_cpu(env));
}
env->misa = val;
--
2.31.1
- [PATCH 05/29] tcg/module: move tcg_ss to module [accel/tcg], (continued)
- [PATCH 05/29] tcg/module: move tcg_ss to module [accel/tcg], Gerd Hoffmann, 2021/08/31
- [PATCH 06/29] tcg/module: move tcg_ss to module [tcg], Gerd Hoffmann, 2021/08/31
- [PATCH 07/29] tcg/module: move files to module [target/i386/tcg], Gerd Hoffmann, 2021/08/31
- [PATCH 08/29] move cpu-exec-common.c from tcg module to core qemu [accel/tcg], Gerd Hoffmann, 2021/08/31
- [PATCH 09/29] tcg/module: add tcg-module.[ch] infrastructure, Gerd Hoffmann, 2021/08/31
- [PATCH 10/29] tcg_funcs: Add tlb_flush to TCGModuleOps, Gerd Hoffmann, 2021/08/31
- [PATCH 11/29] tcg_funcs: Add tlb_flush_page to TCGModuleOps, Gerd Hoffmann, 2021/08/31
- [PATCH 12/29] tcg_funcs: Add tlb_reset_dirty to TCGModuleOps, Gerd Hoffmann, 2021/08/31
- [PATCH 14/29] tcg_funcs:Add tcg_exec_{realizefn, unrealizefn} to TCGModuleOps, Gerd Hoffmann, 2021/08/31
- [PATCH 13/29] tcg_funcs: Add tlb_plugin_lookup to TCGModuleOps, Gerd Hoffmann, 2021/08/31
- [PATCH 15/29] tcg_funcs: Add tb_flush to TCGModuleOps,
Gerd Hoffmann <=
- [PATCH 17/29] tcg: drop tb_invalidate_phys_page_range(), Gerd Hoffmann, 2021/08/31
- [PATCH 16/29] tcg: use tb_page_addr_t for tb_invalidate_phys_range(), Gerd Hoffmann, 2021/08/31
- [PATCH 18/29] tcg_funcs: Add tb_invalidate_phys_range to TCGModuleOps, Gerd Hoffmann, 2021/08/31
- [PATCH 19/29] tcg_funcs: Add tb_check_watchpoint to TCGModuleOps, Gerd Hoffmann, 2021/08/31
- [PATCH 21/29] tcg_funcs: Add curr_cflags to TCGModuleOps, Gerd Hoffmann, 2021/08/31
- [PATCH 20/29] tcg_funcs: Add cpu_restore_state to TCGModuleOps, Gerd Hoffmann, 2021/08/31
- [PATCH 23/29] tcg_i386_funcs: Add update_mxcsr_status to TCGI386ModuleOps, Gerd Hoffmann, 2021/08/31
- [PATCH 22/29] tcg_i386_funcs: Add update_fp_status to TCGI386ModuleOps, Gerd Hoffmann, 2021/08/31
- [PATCH 24/29] tcg_i386_funcs: Add update_mxcsr_from_sse_status to TCGI386ModuleOps, Gerd Hoffmann, 2021/08/31