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[PULL 052/102] target/ppc: Update fres to new flags and float64r32
From: |
Cédric Le Goater |
Subject: |
[PULL 052/102] target/ppc: Update fres to new flags and float64r32 |
Date: |
Wed, 15 Dec 2021 18:03:07 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
There is no double-rounding bug here, because the result is
merely an estimate to within 1 part in 256, but perform the
operation with float64r32_div for consistency.
Use float_flag_invalid_snan instead of recomputing the
snan-ness of the operand.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211119160502.17432-34-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/fpu_helper.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 83c8f2556cc7..c955b20739ac 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -861,20 +861,20 @@ float64 helper_fre(CPUPPCState *env, float64 arg)
/* fres - fres. */
uint64_t helper_fres(CPUPPCState *env, uint64_t arg)
{
- CPU_DoubleU farg;
- float32 f32;
-
- farg.ll = arg;
+ /* "Estimate" the reciprocal with actual division. */
+ float64 ret = float64r32_div(float64_one, arg, &env->fp_status);
+ int flags = get_float_exception_flags(&env->fp_status);
- if (unlikely(float64_is_signaling_nan(farg.d, &env->fp_status))) {
- /* sNaN reciprocal */
+ if (unlikely(flags & float_flag_invalid_snan)) {
float_invalid_op_vxsnan(env, GETPC());
}
- farg.d = float64_div(float64_one, farg.d, &env->fp_status);
- f32 = float64_to_float32(farg.d, &env->fp_status);
- farg.d = float32_to_float64(f32, &env->fp_status);
+ if (unlikely(flags & float_flag_divbyzero)) {
+ float_zero_divide_excp(env, GETPC());
+ /* For FPSCR.ZE == 0, the result is 1/2. */
+ ret = float64_set_sign(float64_half, float64_is_neg(arg));
+ }
- return farg.ll;
+ return ret;
}
/* frsqrte - frsqrte. */
--
2.31.1
- [PULL 032/102] target/ppc: Fix VXCVI return value, (continued)
- [PULL 032/102] target/ppc: Fix VXCVI return value, Cédric Le Goater, 2021/12/15
- [PULL 030/102] target/ppc: Move float_check_status from FPU_FCTI to translate, Cédric Le Goater, 2021/12/15
- [PULL 040/102] target/ppc: Split out do_frsp, Cédric Le Goater, 2021/12/15
- [PULL 036/102] target/ppc: Clean up do_fri, Cédric Le Goater, 2021/12/15
- [PULL 038/102] target/ppc: Split out do_fmadd, Cédric Le Goater, 2021/12/15
- [PULL 050/102] target/ppc: Add helper for fmuls, Cédric Le Goater, 2021/12/15
- [PULL 048/102] target/ppc: Add helper for fsqrts, Cédric Le Goater, 2021/12/15
- [PULL 047/102] target/ppc: Add helpers for fmadds et al, Cédric Le Goater, 2021/12/15
- [PULL 033/102] target/ppc: Remove inline from do_fri, Cédric Le Goater, 2021/12/15
- [PULL 053/102] target/ppc: Use helper_todouble/tosingle in helper_xststdcsp, Cédric Le Goater, 2021/12/15
- [PULL 052/102] target/ppc: Update fres to new flags and float64r32,
Cédric Le Goater <=
- [PULL 051/102] target/ppc: Add helper for frsqrtes, Cédric Le Goater, 2021/12/15
- [PULL 042/102] target/ppc: Use helper_todouble in do_frsp, Cédric Le Goater, 2021/12/15
- [PULL 049/102] target/ppc: Add helpers for fadds, fsubs, fdivs, Cédric Le Goater, 2021/12/15
- [PULL 054/102] target/ppc: Disable software TLB for the 7450 family, Cédric Le Goater, 2021/12/15
- [PULL 060/102] target/ppc: remove 401/403 CPUs, Cédric Le Goater, 2021/12/15
- [PULL 055/102] target/ppc: Disable unused facilities in the e600 CPU, Cédric Le Goater, 2021/12/15
- [PULL 046/102] softfloat: Add float64r32 arithmetic routines, Cédric Le Goater, 2021/12/15
- [PULL 062/102] ppc: Mark the 'taihu' machine as deprecated, Cédric Le Goater, 2021/12/15
- [PULL 066/102] ppc/ppc405: Change ppc405ep_init() return value, Cédric Le Goater, 2021/12/15
- [PULL 058/102] target/ppc: Remove 603e exception model, Cédric Le Goater, 2021/12/15