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[PULL 28/87] target/ppc: implement vsraq
From: |
Cédric Le Goater |
Subject: |
[PULL 28/87] target/ppc: implement vsraq |
Date: |
Wed, 2 Mar 2022 12:07:04 +0100 |
From: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-23-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/insn32.decode | 1 +
target/ppc/translate/vmx-impl.c.inc | 23 +++++++++++++++++------
2 files changed, 18 insertions(+), 6 deletions(-)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 96ee73024218..7a9fc1dffa38 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -485,6 +485,7 @@ VSRAB 000100 ..... ..... ..... 01100000100 @VX
VSRAH 000100 ..... ..... ..... 01101000100 @VX
VSRAW 000100 ..... ..... ..... 01110000100 @VX
VSRAD 000100 ..... ..... ..... 01111000100 @VX
+VSRAQ 000100 ..... ..... ..... 01100000101 @VX
## Vector Integer Arithmetic Instructions
diff --git a/target/ppc/translate/vmx-impl.c.inc
b/target/ppc/translate/vmx-impl.c.inc
index 8a1e64d7f2e0..27ed87fcd6db 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -834,9 +834,10 @@ TRANS_FLAGS(ALTIVEC, VSRAH, do_vector_gvec3_VX, MO_16,
tcg_gen_gvec_sarv);
TRANS_FLAGS(ALTIVEC, VSRAW, do_vector_gvec3_VX, MO_32, tcg_gen_gvec_sarv);
TRANS_FLAGS2(ALTIVEC_207, VSRAD, do_vector_gvec3_VX, MO_64, tcg_gen_gvec_sarv);
-static bool do_vector_shift_quad(DisasContext *ctx, arg_VX *a, bool right)
+static bool do_vector_shift_quad(DisasContext *ctx, arg_VX *a, bool right,
+ bool alg)
{
- TCGv_i64 hi, lo, t0, n, zero = tcg_constant_i64(0);
+ TCGv_i64 hi, lo, t0, t1, n, zero = tcg_constant_i64(0);
REQUIRE_VECTOR(ctx);
@@ -844,6 +845,7 @@ static bool do_vector_shift_quad(DisasContext *ctx, arg_VX
*a, bool right)
hi = tcg_temp_new_i64();
lo = tcg_temp_new_i64();
t0 = tcg_temp_new_i64();
+ t1 = tcg_const_i64(0);
get_avr64(lo, a->vra, false);
get_avr64(hi, a->vra, true);
@@ -853,7 +855,10 @@ static bool do_vector_shift_quad(DisasContext *ctx, arg_VX
*a, bool right)
tcg_gen_andi_i64(t0, n, 64);
if (right) {
tcg_gen_movcond_i64(TCG_COND_NE, lo, t0, zero, hi, lo);
- tcg_gen_movcond_i64(TCG_COND_NE, hi, t0, zero, zero, hi);
+ if (alg) {
+ tcg_gen_sari_i64(t1, lo, 63);
+ }
+ tcg_gen_movcond_i64(TCG_COND_NE, hi, t0, zero, t1, hi);
} else {
tcg_gen_movcond_i64(TCG_COND_NE, hi, t0, zero, lo, hi);
tcg_gen_movcond_i64(TCG_COND_NE, lo, t0, zero, zero, lo);
@@ -861,7 +866,11 @@ static bool do_vector_shift_quad(DisasContext *ctx, arg_VX
*a, bool right)
tcg_gen_andi_i64(n, n, 0x3F);
if (right) {
- tcg_gen_shr_i64(t0, hi, n);
+ if (alg) {
+ tcg_gen_sar_i64(t0, hi, n);
+ } else {
+ tcg_gen_shr_i64(t0, hi, n);
+ }
} else {
tcg_gen_shl_i64(t0, lo, n);
}
@@ -886,13 +895,15 @@ static bool do_vector_shift_quad(DisasContext *ctx,
arg_VX *a, bool right)
tcg_temp_free_i64(hi);
tcg_temp_free_i64(lo);
tcg_temp_free_i64(t0);
+ tcg_temp_free_i64(t1);
tcg_temp_free_i64(n);
return true;
}
-TRANS_FLAGS2(ISA310, VSLQ, do_vector_shift_quad, false);
-TRANS_FLAGS2(ISA310, VSRQ, do_vector_shift_quad, true);
+TRANS_FLAGS2(ISA310, VSLQ, do_vector_shift_quad, false, false);
+TRANS_FLAGS2(ISA310, VSRQ, do_vector_shift_quad, true, false);
+TRANS_FLAGS2(ISA310, VSRAQ, do_vector_shift_quad, true, true);
#define GEN_VXFORM_SAT(NAME, VECE, NORM, SAT, OPC2, OPC3) \
static void glue(glue(gen_, NAME), _vec)(unsigned vece, TCGv_vec t, \
--
2.34.1
- [PULL 18/87] target/ppc: Implement Vector Compare Greater Than Quadword, (continued)
- [PULL 18/87] target/ppc: Implement Vector Compare Greater Than Quadword, Cédric Le Goater, 2022/03/02
- [PULL 23/87] target/ppc: implement vcntmb[bhwd], Cédric Le Goater, 2022/03/02
- [PULL 32/87] target/ppc: implement vrlqnm, Cédric Le Goater, 2022/03/02
- [PULL 26/87] target/ppc: implement vslq, Cédric Le Goater, 2022/03/02
- [PULL 33/87] target/ppc: implement vrlqmi, Cédric Le Goater, 2022/03/02
- [PULL 20/87] target/ppc: implement vstri[bh][lr], Cédric Le Goater, 2022/03/02
- [PULL 22/87] target/ppc: implement vclrrb, Cédric Le Goater, 2022/03/02
- [PULL 15/87] target/ppc: Move Vector Compare Equal/Not Equal/Greater Than to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 24/87] target/ppc: implement vgnb, Cédric Le Goater, 2022/03/02
- [PULL 34/87] target/ppc: Move vsel and vperm/vpermr to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 28/87] target/ppc: implement vsraq,
Cédric Le Goater <=
- [PULL 25/87] target/ppc: move vs[lr][a][bhwd] to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 16/87] target/ppc: Move Vector Compare Not Equal or Zero to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 27/87] target/ppc: implement vsrq, Cédric Le Goater, 2022/03/02
- [PULL 31/87] target/ppc: implement vrlq, Cédric Le Goater, 2022/03/02
- [PULL 30/87] target/ppc: move vrl[bhwd]nm/vrl[bhwd]mi to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 38/87] target/ppc: Implement xxpermx instruction, Cédric Le Goater, 2022/03/02
- [PULL 35/87] target/ppc: Move xxsel to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 29/87] target/ppc: move vrl[bhwd] to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 09/87] target/ppc: Moved vector multiply high and low to decodetree, Cédric Le Goater, 2022/03/02
- [PULL 39/87] tcg/tcg-op-gvec.c: Introduce tcg_gen_gvec_4i, Cédric Le Goater, 2022/03/02