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[PULL 06/23] ppc/pnv: Remove PnvPsiClas::irq_set
From: |
Daniel Henrique Barboza |
Subject: |
[PULL 06/23] ppc/pnv: Remove PnvPsiClas::irq_set |
Date: |
Wed, 20 Apr 2022 19:13:12 -0300 |
From: Cédric Le Goater <clg@kaod.org>
All devices raising PSI interrupts are now converted to use GPIO lines
and the pnv_psi_irq_set() routines have become useless. Drop them.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220323072846.1780212-5-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
hw/ppc/pnv_psi.c | 23 ++++++-----------------
include/hw/ppc/pnv_psi.h | 4 ----
2 files changed, 6 insertions(+), 21 deletions(-)
diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c
index 8b6298d4bd..950ecca405 100644
--- a/hw/ppc/pnv_psi.c
+++ b/hw/ppc/pnv_psi.c
@@ -211,19 +211,9 @@ static const uint64_t stat_bits[PSI_NUM_INTERRUPTS] = {
[PSIHB_IRQ_EXTERNAL] = PSIHB_IRQ_STAT_EXT,
};
-void pnv_psi_irq_set(PnvPsi *psi, int irq, bool state)
-{
- PNV_PSI_GET_CLASS(psi)->irq_set(psi, irq, state);
-}
-
-static void __pnv_psi_irq_set(void *opaque, int irq, int state)
-{
- PnvPsi *psi = (PnvPsi *) opaque;
- PNV_PSI_GET_CLASS(psi)->irq_set(psi, irq, state);
-}
-
-static void pnv_psi_power8_irq_set(PnvPsi *psi, int irq, bool state)
+static void pnv_psi_power8_set_irq(void *opaque, int irq, int state)
{
+ PnvPsi *psi = opaque;
uint32_t xivr_reg;
uint32_t stat_reg;
uint32_t src;
@@ -518,7 +508,7 @@ static void pnv_psi_power8_realize(DeviceState *dev, Error
**errp)
ics_set_irq_type(ics, i, true);
}
- qdev_init_gpio_in(dev, __pnv_psi_irq_set, ics->nr_irqs);
+ qdev_init_gpio_in(dev, pnv_psi_power8_set_irq, ics->nr_irqs);
psi->qirqs = qemu_allocate_irqs(ics_set_irq, ics, ics->nr_irqs);
@@ -581,7 +571,6 @@ static void pnv_psi_power8_class_init(ObjectClass *klass,
void *data)
ppc->xscom_pcba = PNV_XSCOM_PSIHB_BASE;
ppc->xscom_size = PNV_XSCOM_PSIHB_SIZE;
ppc->bar_mask = PSIHB_BAR_MASK;
- ppc->irq_set = pnv_psi_power8_irq_set;
ppc->compat = compat;
ppc->compat_size = sizeof(compat);
}
@@ -819,8 +808,9 @@ static const MemoryRegionOps pnv_psi_p9_xscom_ops = {
}
};
-static void pnv_psi_power9_irq_set(PnvPsi *psi, int irq, bool state)
+static void pnv_psi_power9_set_irq(void *opaque, int irq, int state)
{
+ PnvPsi *psi = opaque;
uint64_t irq_method = psi->regs[PSIHB_REG(PSIHB9_INTERRUPT_CONTROL)];
if (irq > PSIHB9_NUM_IRQS) {
@@ -881,7 +871,7 @@ static void pnv_psi_power9_realize(DeviceState *dev, Error
**errp)
psi->qirqs = qemu_allocate_irqs(xive_source_set_irq, xsrc, xsrc->nr_irqs);
- qdev_init_gpio_in(dev, __pnv_psi_irq_set, xsrc->nr_irqs);
+ qdev_init_gpio_in(dev, pnv_psi_power9_set_irq, xsrc->nr_irqs);
/* XSCOM region for PSI registers */
pnv_xscom_region_init(&psi->xscom_regs, OBJECT(dev), &pnv_psi_p9_xscom_ops,
@@ -908,7 +898,6 @@ static void pnv_psi_power9_class_init(ObjectClass *klass,
void *data)
ppc->xscom_pcba = PNV9_XSCOM_PSIHB_BASE;
ppc->xscom_size = PNV9_XSCOM_PSIHB_SIZE;
ppc->bar_mask = PSIHB9_BAR_MASK;
- ppc->irq_set = pnv_psi_power9_irq_set;
ppc->compat = compat;
ppc->compat_size = sizeof(compat);
diff --git a/include/hw/ppc/pnv_psi.h b/include/hw/ppc/pnv_psi.h
index 6d9f8ce7c0..8253469b8f 100644
--- a/include/hw/ppc/pnv_psi.h
+++ b/include/hw/ppc/pnv_psi.h
@@ -79,8 +79,6 @@ struct PnvPsiClass {
uint64_t bar_mask;
const char *compat;
int compat_size;
-
- void (*irq_set)(PnvPsi *psi, int, bool state);
};
/* The PSI and FSP interrupts are muxed on the same IRQ number */
@@ -95,8 +93,6 @@ typedef enum PnvPsiIrq {
#define PSI_NUM_INTERRUPTS 6
-void pnv_psi_irq_set(PnvPsi *psi, int irq, bool state);
-
/* P9 PSI Interrupts */
#define PSIHB9_IRQ_PSI 0
#define PSIHB9_IRQ_OCC 1
--
2.35.1
- [PULL 00/23] ppc queue, Daniel Henrique Barboza, 2022/04/20
- [PULL 01/23] ppc/pnv: Update skiboot to v7.0, Daniel Henrique Barboza, 2022/04/20
- [PULL 02/23] ppc/spapr/ddw: Add 2M pagesize, Daniel Henrique Barboza, 2022/04/20
- [PULL 03/23] ppc/pnv: Fix PSI IRQ definition, Daniel Henrique Barboza, 2022/04/20
- [PULL 04/23] ppc/pnv: Remove PnvLpcController::psi link, Daniel Henrique Barboza, 2022/04/20
- [PULL 05/23] ppc/pnv: Remove PnvOCC::psi link, Daniel Henrique Barboza, 2022/04/20
- [PULL 06/23] ppc/pnv: Remove PnvPsiClas::irq_set,
Daniel Henrique Barboza <=
- [PULL 07/23] ppc/pnv: Remove useless checks in set_irq handlers, Daniel Henrique Barboza, 2022/04/20
- [PULL 08/23] spapr: Move hypercall_register_softmmu, Daniel Henrique Barboza, 2022/04/20
- [PULL 09/23] spapr: Move nested KVM hypercalls under a TCG only config., Daniel Henrique Barboza, 2022/04/20
- [PULL 10/23] target/ppc: Improve KVM hypercall trace, Daniel Henrique Barboza, 2022/04/20
- [PULL 11/23] qemu/int128: add int128_urshift, Daniel Henrique Barboza, 2022/04/20
- [PULL 12/23] softfloat: add uint128_to_float128, Daniel Henrique Barboza, 2022/04/20
- [PULL 13/23] softfloat: add int128_to_float128, Daniel Henrique Barboza, 2022/04/20
- [PULL 14/23] softfloat: add float128_to_uint128, Daniel Henrique Barboza, 2022/04/20
- [PULL 15/23] softfloat: add float128_to_int128, Daniel Henrique Barboza, 2022/04/20
- [PULL 16/23] target/ppc: implement xscv[su]qqp, Daniel Henrique Barboza, 2022/04/20