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[RFC PATCH 0/3] Floating-point OE/UE exception bug


From: Lucas Mateus Castro(alqotel)
Subject: [RFC PATCH 0/3] Floating-point OE/UE exception bug
Date: Wed, 3 Aug 2022 09:22:14 -0300

From: "Lucas Mateus Castro (alqotel)" <lucas.araujo@eldorado.org.br>

The PowerISA defines that if an overflow exception happen with FPSCR.OE
set, the exponent of the intermediate result is subtracted 1536 in
double precision operations and is added 1536 in an underflow exception,
currently this behavior is not QEMU's behavior, this patch series fixes
that.

Currently there's no test in this patch series as there's no way to
disable MSR.FE0 and MSR.FE1 in linux user, so any overflow/underflow
exception with OE/UE set causes a trapping exception.

This patch series is not complete as it's still missing many other
instructions (including all single precision ones), so I'd just like to
request comment on the approach used here.

Thanks.

Lucas Mateus Castro (alqotel) (3):
  target/ppc: Bugfix fadd/fsub result with OE/UE set
  target/ppc: Bugfix fmul result with OE/UE set
  target/ppc: Bugfix fdiv result with OE/UE set

 fpu/softfloat.c         | 135 ++++++++++++++++++++++++++++++++++++++++
 include/fpu/softfloat.h |   4 ++
 target/ppc/fpu_helper.c |  20 ++++--
 3 files changed, 155 insertions(+), 4 deletions(-)

-- 
2.31.1




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