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[PATCH 17/20] hw/arm: Open-code pflash_cfi02_register()
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 17/20] hw/arm: Open-code pflash_cfi02_register() |
Date: |
Wed, 4 Jan 2023 23:04:46 +0100 |
pflash_cfi02_register() hides an implicit sysbus mapping of
MMIO region #0. This is not practical in a heterogeneous world
where multiple cores use different address spaces. In order to
remove to remove pflash_cfi02_register() from the pflash API,
open-code it as a qdev creation call followed by an explicit
sysbus mapping.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/digic_boards.c | 14 ++++++++------
hw/arm/musicpal.c | 13 +++++++------
hw/arm/xilinx_zynq.c | 10 +++++-----
3 files changed, 20 insertions(+), 17 deletions(-)
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index 4093af09cb..98b0002d16 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -115,13 +115,15 @@ static void digic4_add_k8p3215uqb_rom(DigicState *s,
hwaddr addr,
{
#define FLASH_K8P3215UQB_SIZE (4 * 1024 * 1024)
#define FLASH_K8P3215UQB_SECTOR_SIZE (64 * 1024)
+ DeviceState *dev;
- pflash_cfi02_register(addr, "pflash", FLASH_K8P3215UQB_SIZE,
- NULL, FLASH_K8P3215UQB_SECTOR_SIZE,
- DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE,
- 4,
- 0x00EC, 0x007E, 0x0003, 0x0001,
- 0x0555, 0x2aa, 0);
+ dev = pflash_cfi02_create("pflash", FLASH_K8P3215UQB_SIZE,
+ NULL, FLASH_K8P3215UQB_SECTOR_SIZE,
+ DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE,
+ 4,
+ 0x00EC, 0x007E, 0x0003, 0x0001,
+ 0x0555, 0x2aa, 0);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr);
digic_load_rom(s, addr, FLASH_K8P3215UQB_SIZE, filename);
}
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index b65c020115..9f75d69b7f 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -1275,12 +1275,13 @@ static void musicpal_init(MachineState *machine)
* 0xFF800000 (if there is 8 MB flash). So remap flash access if the
* image is smaller than 32 MB.
*/
- pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX,
- "musicpal.flash", flash_size,
- blk, 0x10000,
- MP_FLASH_SIZE_MAX / flash_size,
- 2, 0x00BF, 0x236D, 0x0000, 0x0000,
- 0x5555, 0x2AAA, 0);
+ dev = pflash_cfi02_create("musicpal.flash", flash_size,
+ blk, 0x10000,
+ MP_FLASH_SIZE_MAX / flash_size,
+ 2, 0x00BF, 0x236D, 0x0000, 0x0000,
+ 0x5555, 0x2AAA, 0);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0,
+ 0x100000000ULL - MP_FLASH_SIZE_MAX);
}
sysbus_create_simple(TYPE_MV88W8618_FLASHCFG, MP_FLASHCFG_BASE, NULL);
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 3190cc0b8d..e55aff5532 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -218,11 +218,11 @@ static void zynq_init(MachineState *machine)
DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0);
/* AMD */
- pflash_cfi02_register(0xe2000000, "zynq.pflash", FLASH_SIZE,
- dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- FLASH_SECTOR_SIZE, 1,
- 1, 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa,
- 0);
+ dev = pflash_cfi02_create("zynq.pflash", FLASH_SIZE,
+ dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
+ FLASH_SECTOR_SIZE, 1, 1,
+ 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa,
0);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xe2000000);
/* Create the main clock source, and feed slcr with it */
zynq_machine->ps_clk = CLOCK(object_new(TYPE_CLOCK));
--
2.38.1
- [PATCH 08/20] hw/xtensa: Use generic DeviceState instead of PFlashCFI01, (continued)
- [PATCH 08/20] hw/xtensa: Use generic DeviceState instead of PFlashCFI01, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 09/20] hw/block: Factor pflash_cfi01_create() out of pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 10/20] hw/arm: Open-code pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 11/20] hw/microblaze: Open-code pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 12/20] hw/mips: Open-code pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 13/20] hw/ppc: Open-code pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 14/20] hw/block: Remove unused pflash_cfi01_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 16/20] hw/block: Factor pflash_cfi02_create() out of pflash_cfi02_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 15/20] hw/block: Make PFlashCFI01 QOM declaration internal, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 17/20] hw/arm: Open-code pflash_cfi02_register(),
Philippe Mathieu-Daudé <=
- [PATCH 18/20] hw/sh4: Open-code pflash_cfi02_register(), Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 20/20] hw/block: Make PFlashCFI02 QOM declaration internal, Philippe Mathieu-Daudé, 2023/01/04
- [PATCH 19/20] hw/block: Remove unused pflash_cfi02_register(), Philippe Mathieu-Daudé, 2023/01/04
- Re: [PATCH 00/20] hw: Remove implicit sysbus_mmio_map() from pflash APIs, Peter Maydell, 2023/01/06