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[PATCH v6 17/33] hw/isa/piix3: Create IDE controller in host device
From: |
Bernhard Beschow |
Subject: |
[PATCH v6 17/33] hw/isa/piix3: Create IDE controller in host device |
Date: |
Mon, 9 Jan 2023 18:23:30 +0100 |
Now that PIIX3 contains the new TYPE_ISA_PIC, it is possible to
instantiate PIIX3 IDE in the PIIX3 southbridge. PIIX3 IDE wires up its
interrupts to the ISA bus in its realize method which requires the
interrupt controller to provide fully populated qemu_irqs. This is the
case for TYPE_ISA_PIC even though the virtualization technology isn't
known yet.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20221022150508.26830-17-shentey@gmail.com>
---
include/hw/southbridge/piix.h | 2 ++
hw/i386/pc_piix.c | 15 ++++++---------
hw/isa/piix3.c | 8 ++++++++
hw/i386/Kconfig | 1 -
hw/isa/Kconfig | 1 +
5 files changed, 17 insertions(+), 10 deletions(-)
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index 514ccdb7fd..e3c35ca16f 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -15,6 +15,7 @@
#include "hw/pci/pci_device.h"
#include "qom/object.h"
#include "hw/acpi/piix4.h"
+#include "hw/ide/pci.h"
#include "hw/intc/i8259.h"
#include "hw/rtc/mc146818rtc.h"
#include "hw/usb/hcd-uhci.h"
@@ -56,6 +57,7 @@ struct PIIXState {
ISAPICState pic;
RTCState rtc;
+ PCIIDEState ide;
UHCIState uhci;
PIIX4PMState pm;
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index df8e2e389b..4675981021 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -41,7 +41,6 @@
#include "hw/usb.h"
#include "net/net.h"
#include "hw/ide/pci.h"
-#include "hw/ide/piix.h"
#include "hw/irq.h"
#include "sysemu/kvm.h"
#include "hw/kvm/clock.h"
@@ -98,7 +97,6 @@ static void pc_init1(MachineState *machine,
PCIBus *pci_bus;
ISABus *isa_bus;
Object *piix4_pm;
- int piix3_devfn = -1;
qemu_irq smi_irq;
GSIState *gsi_state;
BusState *idebus[MAX_IDE_BUS];
@@ -252,11 +250,14 @@ static void pc_init1(MachineState *machine,
for (i = 0; i < ISA_NUM_IRQS; i++) {
qdev_connect_gpio_out(dev, i, x86ms->gsi[i]);
}
- piix3_devfn = pci_dev->devfn;
isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0"));
rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
"rtc"));
piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm");
+ dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide"));
+ pci_ide_create_devs(PCI_DEVICE(dev));
+ idebus[0] = qdev_get_child_bus(dev, "ide.0");
+ idebus[1] = qdev_get_child_bus(dev, "ide.1");
} else {
pci_bus = NULL;
piix4_pm = NULL;
@@ -270,6 +271,8 @@ static void pc_init1(MachineState *machine,
i8257_dma_init(isa_bus, 0);
pcms->hpet_enabled = false;
+ idebus[0] = NULL;
+ idebus[1] = NULL;
}
if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
@@ -298,12 +301,6 @@ static void pc_init1(MachineState *machine,
pc_nic_init(pcmc, isa_bus, pci_bus);
if (pcmc->pci_enabled) {
- PCIDevice *dev;
-
- dev = pci_create_simple(pci_bus, piix3_devfn + 1, TYPE_PIIX3_IDE);
- pci_ide_create_devs(dev);
- idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
- idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
}
#ifdef CONFIG_IDE_ISA
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index 88a6bf28ea..a549b1a8a5 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -29,6 +29,7 @@
#include "hw/southbridge/piix.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
+#include "hw/ide/piix.h"
#include "hw/isa/isa.h"
#include "hw/xen/xen.h"
#include "sysemu/runstate.h"
@@ -317,6 +318,12 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
return;
}
+ /* IDE */
+ qdev_prop_set_int32(DEVICE(&d->ide), "addr", dev->devfn + 1);
+ if (!qdev_realize(DEVICE(&d->ide), BUS(pci_bus), errp)) {
+ return;
+ }
+
/* USB */
if (d->has_usb) {
object_initialize_child(OBJECT(dev), "uhci", &d->uhci,
@@ -369,6 +376,7 @@ static void pci_piix3_init(Object *obj)
object_initialize_child(obj, "pic", &d->pic, TYPE_ISA_PIC);
object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC);
+ object_initialize_child(obj, "ide", &d->ide, TYPE_PIIX3_IDE);
}
static Property pci_piix3_props[] = {
diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig
index 1291f59896..7e53dc8f82 100644
--- a/hw/i386/Kconfig
+++ b/hw/i386/Kconfig
@@ -74,7 +74,6 @@ config I440FX
select I8259
select PCI_I440FX
select PIIX3
- select IDE_PIIX
select DIMM
select SMBIOS
select FW_CFG_DMA
diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig
index fccf095d07..b911306909 100644
--- a/hw/isa/Kconfig
+++ b/hw/isa/Kconfig
@@ -36,6 +36,7 @@ config PIIX3
select ACPI_PIIX4
select I8257
select I8259
+ select IDE_PIIX
select ISA_BUS
select MC146818RTC
select USB_UHCI
--
2.39.0
- [PATCH v6 05/33] hw/isa/piix3: Decouple INTx-to-LNKx routing which is board-specific, (continued)
- [PATCH v6 05/33] hw/isa/piix3: Decouple INTx-to-LNKx routing which is board-specific, Bernhard Beschow, 2023/01/09
- [PATCH v6 06/33] hw/isa/piix4: Decouple INTx-to-LNKx routing which is board-specific, Bernhard Beschow, 2023/01/09
- [PATCH v6 07/33] hw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig, Bernhard Beschow, 2023/01/09
- [PATCH v6 08/33] hw/usb/hcd-uhci: Introduce TYPE_ defines for device models, Bernhard Beschow, 2023/01/09
- [PATCH v6 10/33] hw/intc/i8259: Introduce i8259 proxy TYPE_ISA_PIC, Bernhard Beschow, 2023/01/09
- [PATCH v6 09/33] hw/intc/i8259: Make using the isa_pic singleton more type-safe, Bernhard Beschow, 2023/01/09
- [PATCH v6 11/33] hw/i386/pc: Create RTC controllers in south bridges, Bernhard Beschow, 2023/01/09
- [PATCH v6 12/33] hw/i386/pc: No need for rtc_state to be an out-parameter, Bernhard Beschow, 2023/01/09
- [PATCH v6 17/33] hw/isa/piix3: Create IDE controller in host device,
Bernhard Beschow <=
- [PATCH v6 14/33] hw/isa/piix3: Create USB controller in host device, Bernhard Beschow, 2023/01/09
- [PATCH v6 16/33] hw/isa/piix3: Create TYPE_ISA_PIC in host device, Bernhard Beschow, 2023/01/09
- [PATCH v6 18/33] hw/isa/piix3: Wire up ACPI interrupt internally, Bernhard Beschow, 2023/01/09
- [PATCH v6 13/33] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge, Bernhard Beschow, 2023/01/09
- [PATCH v6 21/33] hw/isa/piix3: Rename piix3_reset() for sharing with PIIX4, Bernhard Beschow, 2023/01/09
- [PATCH v6 20/33] hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4, Bernhard Beschow, 2023/01/09
- [PATCH v6 15/33] hw/isa/piix3: Create power management controller in host device, Bernhard Beschow, 2023/01/09