On 2 March 2023 22:40:40 GMT, "Philippe Mathieu-Daudé" <philmd@linaro.org>
wrote:
Since v2: rebased
I'm posting this series as it to not block Bernhard's PIIX
cleanup work. I don't have code change planned, but eventually
reword / improve commit descriptions.
Tested commit after commit to be sure it is bisectable. Sadly
this was before Zoltan & Thomas report a problem with commit
bb98e0f59c ("hw/isa/vt82c686: Remove intermediate IRQ forwarder").
However much I stare at the partial revert which fixes it, I just cannot
believe that the change could make any difference at all. There's got to be
something weird going on there.
I was going to ask if the level mode for the PIT made any difference, but this
is the output IRQ from the PIT to the CPU itself so I don't see how it would.
Would like to see a report with tracing from pic_update_irq, the CPU interrupt
"handler" and the intermediate IRQ handler. With the intermediate present and
without it. To compare the two.