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[PATCH v2 5/5] ppc/pnv: Return zero for core thread state xscom
From: |
Joel Stanley |
Subject: |
[PATCH v2 5/5] ppc/pnv: Return zero for core thread state xscom |
Date: |
Tue, 4 Jul 2023 15:12:04 +0930 |
Firmware now warns if booting in LPAR per core mode (PPC bit 62). So
this warning doesn't trigger, report the core thread state is 0.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
hw/ppc/pnv_core.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index 1eec28c88c41..b7223bb44597 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -116,6 +116,8 @@ static const MemoryRegionOps pnv_core_power8_xscom_ops = {
#define PNV9_XSCOM_EC_PPM_SPECIAL_WKUP_HYP 0xf010d
#define PNV9_XSCOM_EC_PPM_SPECIAL_WKUP_OTR 0xf010a
+#define PNV9_XSCOM_EC_CORE_THREAD_STATE 0x10ab3
+
static uint64_t pnv_core_power9_xscom_read(void *opaque, hwaddr addr,
unsigned int width)
{
@@ -134,6 +136,9 @@ static uint64_t pnv_core_power9_xscom_read(void *opaque,
hwaddr addr,
case PNV9_XSCOM_EC_PPM_SPECIAL_WKUP_OTR:
val = 0x0;
break;
+ case PNV9_XSCOM_EC_CORE_THREAD_STATE:
+ val = 0;
+ break;
default:
qemu_log_mask(LOG_UNIMP, "Warning: reading reg=0x%" HWADDR_PRIx "\n",
addr);
@@ -171,6 +176,8 @@ static const MemoryRegionOps pnv_core_power9_xscom_ops = {
* POWER10 core controls
*/
+#define PNV10_XSCOM_EC_CORE_THREAD_STATE 0x412
+
static uint64_t pnv_core_power10_xscom_read(void *opaque, hwaddr addr,
unsigned int width)
{
@@ -178,6 +185,9 @@ static uint64_t pnv_core_power10_xscom_read(void *opaque,
hwaddr addr,
uint64_t val = 0;
switch (offset) {
+ case PNV10_XSCOM_EC_CORE_THREAD_STATE:
+ val = 0;
+ break;
default:
qemu_log_mask(LOG_UNIMP, "Warning: reading reg=0x%" HWADDR_PRIx "\n",
addr);
--
2.40.1
- [PATCH v2 0/5] ppc/pnv: Extend "quad" model for p10, Joel Stanley, 2023/07/04
- [PATCH v2 3/5] ppc/pnv: Add P10 quad xscom model, Joel Stanley, 2023/07/04
- [PATCH v2 2/5] ppc/pnv: Subclass quad xscom callbacks, Joel Stanley, 2023/07/04
- [PATCH v2 4/5] ppc/pnv: Add P10 core xscom model, Joel Stanley, 2023/07/04
- [PATCH v2 5/5] ppc/pnv: Return zero for core thread state xscom,
Joel Stanley <=
- [PATCH v2 1/5] ppc/pnv: quad xscom callbacks are P9 specific, Joel Stanley, 2023/07/04
- Re: [PATCH v2 0/5] ppc/pnv: Extend "quad" model for p10, Daniel Henrique Barboza, 2023/07/04
- Re: [PATCH v2 0/5] ppc/pnv: Extend "quad" model for p10, Nicholas Piggin, 2023/07/04