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[PULL 27/49] ppc/pnv: Wire up pca9552 GPIO pins for PCIe hotplug power c
From: |
Nicholas Piggin |
Subject: |
[PULL 27/49] ppc/pnv: Wire up pca9552 GPIO pins for PCIe hotplug power control |
Date: |
Mon, 19 Feb 2024 18:29:16 +1000 |
From: Glenn Miles <milesg@linux.vnet.ibm.com>
For power10-rainier, a pca9552 device is used for PCIe slot hotplug
power control by the Power Hypervisor code. The code expects that
some time after it enables power to a PCIe slot by asserting one of
the pca9552 GPIO pins 0-4, it should see a "power good" signal asserted
on one of pca9552 GPIO pins 5-9.
To simulate this behavior, we simply connect the GPIO outputs for
pins 0-4 to the GPIO inputs for pins 5-9.
Each PCIe slot is assigned 3 GPIO pins on the pca9552 device, for
control of up to 5 PCIe slots. The per-slot signal names are:
SLOTx_EN.......PHYP uses this as an output to enable
slot power. We connect this to the
SLOTx_PG pin to simulate a PGOOD signal.
SLOTx_PG.......PHYP uses this as in input to detect
PGOOD for the slot. For our purposes
we just connect this to the SLOTx_EN
output.
SLOTx_Control..PHYP uses this as an output to prevent
a race condition in the real hotplug
circuitry, but we can ignore this output
for simulation.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
hw/ppc/pnv.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 78f5c6262a..97bdfb2d1e 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1900,7 +1900,19 @@ static void pnv_rainier_i2c_init(PnvMachineState *pnv)
* Add a PCA9552 I2C device for PCIe hotplug control
* to engine 2, bus 1, address 0x63
*/
- i2c_slave_create_simple(chip10->i2c[2].busses[1], "pca9552", 0x63);
+ I2CSlave *dev = i2c_slave_create_simple(chip10->i2c[2].busses[1],
+ "pca9552", 0x63);
+
+ /*
+ * Connect PCA9552 GPIO pins 0-4 (SLOTx_EN) outputs to GPIO pins 5-9
+ * (SLOTx_PG) inputs in order to fake the pgood state of PCIe slots
+ * after hypervisor code sets a SLOTx_EN pin high.
+ */
+ qdev_connect_gpio_out(DEVICE(dev), 0, qdev_get_gpio_in(DEVICE(dev),
5));
+ qdev_connect_gpio_out(DEVICE(dev), 1, qdev_get_gpio_in(DEVICE(dev),
6));
+ qdev_connect_gpio_out(DEVICE(dev), 2, qdev_get_gpio_in(DEVICE(dev),
7));
+ qdev_connect_gpio_out(DEVICE(dev), 3, qdev_get_gpio_in(DEVICE(dev),
8));
+ qdev_connect_gpio_out(DEVICE(dev), 4, qdev_get_gpio_in(DEVICE(dev),
9));
}
}
--
2.42.0
- [PULL 22/49] hw/pci-host/raven.c: Mark raven_io_ops as implementing unaligned accesses, (continued)
[PULL 23/49] misc/pca9552: Fix inverted input status, Nicholas Piggin, 2024/02/19
[PULL 21/49] ppc/pnv: Change powernv default to powernv10, Nicholas Piggin, 2024/02/19
[PULL 24/49] misc/pca9552: Let external devices set pca9552 inputs, Nicholas Piggin, 2024/02/19
[PULL 25/49] ppc/pnv: New powernv10-rainier machine type, Nicholas Piggin, 2024/02/19
[PULL 26/49] ppc/pnv: Add pca9552 to powernv10-rainier for PCIe hotplug power control, Nicholas Piggin, 2024/02/19
[PULL 27/49] ppc/pnv: Wire up pca9552 GPIO pins for PCIe hotplug power control,
Nicholas Piggin <=
[PULL 28/49] ppc/pnv: Use resettable interface to reset child I2C buses, Nicholas Piggin, 2024/02/19
[PULL 31/49] ppc/pnv: Test pnv i2c master and connected devices, Nicholas Piggin, 2024/02/19
[PULL 30/49] ppc/pnv: Add a pca9554 I2C device to powernv10-rainier, Nicholas Piggin, 2024/02/19
[PULL 29/49] misc: Add a pca9554 GPIO device model, Nicholas Piggin, 2024/02/19
[PULL 32/49] hw/ppc: Add pnv nest pervasive common chiplet model, Nicholas Piggin, 2024/02/19
[PULL 33/49] hw/ppc: Add N1 chiplet model, Nicholas Piggin, 2024/02/19
[PULL 34/49] hw/ppc: N1 chiplet wiring, Nicholas Piggin, 2024/02/19
[PULL 38/49] target/ppc: Fix move-to timebase SPR access permissions, Nicholas Piggin, 2024/02/19
[PULL 36/49] target/ppc: Rename TBL to TB on 64-bit, Nicholas Piggin, 2024/02/19
[PULL 35/49] target/ppc: Update gdbstub to read SPR's CFAR, DEC, HDEC, TB-L/U, Nicholas Piggin, 2024/02/19