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[PULL 34/47] target/ppc: Rename TBL to TB on 64-bit
From: |
Nicholas Piggin |
Subject: |
[PULL 34/47] target/ppc: Rename TBL to TB on 64-bit |
Date: |
Sat, 24 Feb 2024 01:41:53 +1000 |
>From the earliest PowerPC ISA, TBR (later SPR) 268 has been called TB
and accessed with mftb instruction. The problem is that TB is the name
of the 64-bit register, and 32-bit implementations can only read the
lower half with one instruction, so 268 has also been called TBL and
it does only read TBL on 32-bit.
Change SPR 268 to be called TB on 64-bit implementations.
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/helper_regs.c | 4 ++++
target/ppc/ppc-qmp-cmds.c | 4 ++++
2 files changed, 8 insertions(+)
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index 8324ff22db..8f5bd1536e 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -460,7 +460,11 @@ void register_generic_sprs(PowerPCCPU *cpu)
}
/* Time base */
+#if defined(TARGET_PPC64)
+ spr_register(env, SPR_VTBL, "TB",
+#else
spr_register(env, SPR_VTBL, "TBL",
+#endif
&spr_read_tbl, SPR_NOACCESS,
&spr_read_tbl, SPR_NOACCESS,
0x00000000);
diff --git a/target/ppc/ppc-qmp-cmds.c b/target/ppc/ppc-qmp-cmds.c
index c0c137d9d7..ee0b99fce7 100644
--- a/target/ppc/ppc-qmp-cmds.c
+++ b/target/ppc/ppc-qmp-cmds.c
@@ -103,7 +103,11 @@ const MonitorDef monitor_defs[] = {
{ "xer", 0, &monitor_get_xer },
{ "msr", offsetof(CPUPPCState, msr) },
{ "tbu", 0, &monitor_get_tbu, },
+#if defined(TARGET_PPC64)
+ { "tb", 0, &monitor_get_tbl, },
+#else
{ "tbl", 0, &monitor_get_tbl, },
+#endif
{ NULL },
};
--
2.42.0
- [PULL 04/47] tests/avocado: improve flaky ppc/pnv boot_linux_console.py test, (continued)
- [PULL 04/47] tests/avocado: improve flaky ppc/pnv boot_linux_console.py test, Nicholas Piggin, 2024/02/23
- [PULL 07/47] tests/avocado: Add pseries KVM boot_linux test, Nicholas Piggin, 2024/02/23
- [PULL 08/47] tests/avocado: ppc add hypervisor tests, Nicholas Piggin, 2024/02/23
- [PULL 09/47] tests/avocado: Use default CPU for pseries machine, Nicholas Piggin, 2024/02/23
- [PULL 13/47] hw/ppc/spapr_hcall: Allow elision of softmmu_resize_hpt_prep, Nicholas Piggin, 2024/02/23
- [PULL 10/47] ppc/pnv: Update skiboot to v7.1, Nicholas Piggin, 2024/02/23
- [PULL 21/47] misc/pca9552: Fix inverted input status, Nicholas Piggin, 2024/02/23
- [PULL 23/47] ppc/pnv: New powernv10-rainier machine type, Nicholas Piggin, 2024/02/23
- [PULL 14/47] hw/ppc/spapr_hcall: Rename {softmmu -> vhyp_mmu}_resize_hpt_pr, Nicholas Piggin, 2024/02/23
- [PULL 27/47] misc: Add a pca9554 GPIO device model, Nicholas Piggin, 2024/02/23
- [PULL 34/47] target/ppc: Rename TBL to TB on 64-bit,
Nicholas Piggin <=
- [PULL 38/47] ppc/pnv: Wire ChipTOD model to powernv9 and powernv10 machines, Nicholas Piggin, 2024/02/23
- [PULL 40/47] target/ppc: Implement core timebase state machine and TFMR, Nicholas Piggin, 2024/02/23
- [PULL 47/47] target/ppc: optimise ppcemb_tlb_t flushing, Nicholas Piggin, 2024/02/23
- Re: [PULL 00/47] ppc-for-9.0 queue, Peter Maydell, 2024/02/24