Re: [Qemu-riscv] [PATCH v4 04/35] target/riscv: Convert RV32I load/store

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Re: [Qemu-riscv] [PATCH v4 04/35] target/riscv: Convert RV32I load/store

From:	Richard Henderson
Subject:	Re: [Qemu-riscv] [PATCH v4 04/35] target/riscv: Convert RV32I load/store insns to decodetree
Date:	Sun, 20 Jan 2019 08:20:52 +1100
User-agent:	Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0

On 1/19/19 12:14 AM, Bastian Koppelmann wrote:
> Signed-off-by: Bastian Koppelmann <address@hidden>
> Signed-off-by: Peer Adelt <address@hidden>
> ---
> v3 -> v4:
>     - removed accidental argument removal
> 
>  target/riscv/insn32.decode              | 10 ++++++
>  target/riscv/insn_trans/trans_rvi.inc.c | 48 +++++++++++++++++++++++++
>  2 files changed, 58 insertions(+)

Reviewed-by: Richard Henderson <address@hidden>


r~

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[Qemu-riscv] [PATCH v4 00/35] target/riscv: Convert to decodetree, Bastian Koppelmann, 2019/01/18
- [Qemu-riscv] [PATCH v4 02/35] target/riscv: Activate decodetree and implemnt LUI & AUIPC, Bastian Koppelmann, 2019/01/18
- [Qemu-riscv] [PATCH v4 01/35] target/riscv: Move CPURISCVState pointer to DisasContext, Bastian Koppelmann, 2019/01/18
- [Qemu-riscv] [PATCH v4 08/35] target/riscv: Convert RVXI csr insns to decodetree, Bastian Koppelmann, 2019/01/18
- [Qemu-riscv] [PATCH v4 03/35] target/riscv: Convert RVXI branch insns to decodetree, Bastian Koppelmann, 2019/01/18
- [Qemu-riscv] [PATCH v4 07/35] target/riscv: Convert RVXI fence insns to decodetree, Bastian Koppelmann, 2019/01/18
  - Re: [Qemu-riscv] [PATCH v4 07/35] target/riscv: Convert RVXI fence insns to decodetree, Richard Henderson, 2019/01/19
    - Re: [Qemu-riscv] [Qemu-devel] [PATCH v4 07/35] target/riscv: Convert RVXI fence insns to decodetree, Bastian Koppelmann, 2019/01/21
- [Qemu-riscv] [PATCH v4 04/35] target/riscv: Convert RV32I load/store insns to decodetree, Bastian Koppelmann, 2019/01/18
  - Re: [Qemu-riscv] [PATCH v4 04/35] target/riscv: Convert RV32I load/store insns to decodetree, Richard Henderson <=
- [Qemu-riscv] [PATCH v4 05/35] target/riscv: Convert RV64I load/store insns to decodetree, Bastian Koppelmann, 2019/01/18
- [Qemu-riscv] [PATCH v4 13/35] target/riscv: Convert RV64F insns to decodetree, Bastian Koppelmann, 2019/01/18
- [Qemu-riscv] [PATCH v4 06/35] target/riscv: Convert RVXI arithmetic insns to decodetree, Bastian Koppelmann, 2019/01/18
- [Qemu-riscv] [PATCH v4 18/35] target/riscv: Convert quadrant 1 of RVXC insns to decodetree, Bastian Koppelmann, 2019/01/18
- [Qemu-riscv] [PATCH v4 15/35] target/riscv: Convert RV64D insns to decodetree, Bastian Koppelmann, 2019/01/18
- [Qemu-riscv] [PATCH v4 11/35] target/riscv: Convert RV64A insns to decodetree, Bastian Koppelmann, 2019/01/18
- [Qemu-riscv] [PATCH v4 16/35] target/riscv: Convert RV priv insns to decodetree, Bastian Koppelmann, 2019/01/18
  - Re: [Qemu-riscv] [PATCH v4 16/35] target/riscv: Convert RV priv insns to decodetree, Richard Henderson, 2019/01/19
- [Qemu-riscv] [PATCH v4 23/35] target/riscv: Remove manual decoding from gen_store(), Bastian Koppelmann, 2019/01/18
- [Qemu-riscv] [PATCH v4 25/35] target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists, Bastian Koppelmann, 2019/01/18

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