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[Stable-7.2.10 20/33] target/arm: Fix nregs computation in do_{ld, st}_z
From: |
Michael Tokarev |
Subject: |
[Stable-7.2.10 20/33] target/arm: Fix nregs computation in do_{ld, st}_zpa |
Date: |
Thu, 22 Feb 2024 00:47:03 +0300 |
From: Richard Henderson <richard.henderson@linaro.org>
The field is encoded as [0-3], which is convenient for
indexing our array of function pointers, but the true
value is [1-4]. Adjust before calling do_mem_zpa.
Add an assert, and move the comment re passing ZT to
the helper back next to the relevant code.
Cc: qemu-stable@nongnu.org
Fixes: 206adacfb8d ("target/arm: Add mte helpers for sve scalar + int loads")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Gustavo Romero <gustavo.romero@linaro.org>
Message-id: 20240207025210.8837-3-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
(cherry picked from commit 64c6e7444dff64b42d11b836b9aec9acfbe8ecc2)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 621a2abb22..7388e1dbc7 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -4587,11 +4587,7 @@ static void do_mem_zpa(DisasContext *s, int zt, int pg,
TCGv_i64 addr,
TCGv_ptr t_pg;
int desc = 0;
- /*
- * For e.g. LD4, there are not enough arguments to pass all 4
- * registers as pointers, so encode the regno into the data field.
- * For consistency, do this even for LD1.
- */
+ assert(mte_n >= 1 && mte_n <= 4);
if (s->mte_active[0]) {
int msz = dtype_msz(dtype);
@@ -4605,6 +4601,11 @@ static void do_mem_zpa(DisasContext *s, int zt, int pg,
TCGv_i64 addr,
addr = clean_data_tbi(s, addr);
}
+ /*
+ * For e.g. LD4, there are not enough arguments to pass all 4
+ * registers as pointers, so encode the regno into the data field.
+ * For consistency, do this even for LD1.
+ */
desc = simd_desc(vsz, vsz, zt | desc);
t_pg = tcg_temp_new_ptr();
@@ -4744,7 +4745,7 @@ static void do_ld_zpa(DisasContext *s, int zt, int pg,
* accessible via the instruction encoding.
*/
assert(fn != NULL);
- do_mem_zpa(s, zt, pg, addr, dtype, nreg, false, fn);
+ do_mem_zpa(s, zt, pg, addr, dtype, nreg + 1, false, fn);
}
static bool trans_LD_zprr(DisasContext *s, arg_rprr_load *a)
@@ -5320,14 +5321,13 @@ static void do_st_zpa(DisasContext *s, int zt, int pg,
TCGv_i64 addr,
if (nreg == 0) {
/* ST1 */
fn = fn_single[s->mte_active[0]][be][msz][esz];
- nreg = 1;
} else {
/* ST2, ST3, ST4 -- msz == esz, enforced by encoding */
assert(msz == esz);
fn = fn_multiple[s->mte_active[0]][be][nreg - 1][msz];
}
assert(fn != NULL);
- do_mem_zpa(s, zt, pg, addr, msz_dtype(s, msz), nreg, true, fn);
+ do_mem_zpa(s, zt, pg, addr, msz_dtype(s, msz), nreg + 1, true, fn);
}
static bool trans_ST_zprr(DisasContext *s, arg_rprr_store *a)
--
2.39.2
- [Stable-7.2.10 11/33] cxl/cdat: Handle cdat table build errors, (continued)
- [Stable-7.2.10 11/33] cxl/cdat: Handle cdat table build errors, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 10/33] vhost-user.rst: Fix vring address description, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 12/33] cxl/cdat: Fix header sum value in CDAT checksum, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 13/33] hw/cxl: Pass CXLComponentState to cache_mem_ops, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 15/33] smmu: Clear SMMUPciBus pointer cache when system reset, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 16/33] tests/acpi: Allow update of DSDT.cxl, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 17/33] hw/i386: Fix _STA return value for ACPI0017, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 14/33] virtio_iommu: Clear IOMMUPciBus pointer cache when system reset, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 18/33] tests/acpi: Update DSDT.cxl to reflect change _STA return value., Michael Tokarev, 2024/02/21
- [Stable-7.2.10 19/33] linux-user/aarch64: Choose SYNC as the preferred MTE mode, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 20/33] target/arm: Fix nregs computation in do_{ld, st}_zpa,
Michael Tokarev <=
- [Stable-7.2.10 22/33] target/arm: Don't get MDCR_EL2 in pmu_counter_enabled() before checking ARM_FEATURE_PMU, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 21/33] target/arm: Fix SVE/SME gross MTE suppression checks, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 23/33] iotests: Make 144 deterministic again, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 24/33] i386/cpu: Clear FEAT_XSAVE_XSS_LO/HI leafs when CPUID_EXT_XSAVE is not available, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 26/33] i386/cpuid: Decrease cpuid_i when skipping CPUID leaf 1F, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 28/33] target/i386: Generate an illegal opcode exception on cmp instructions with lock prefix, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 25/33] i386/cpu: Mask with XCR0/XSS mask for FEAT_XSAVE_XCR0_HI and FEAT_XSAVE_XSS_HI leafs, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 27/33] i386/cpuid: Move leaf 7 to correct group, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 29/33] ui: reject extended clipboard message if not activated, Michael Tokarev, 2024/02/21
- [Stable-7.2.10 30/33] ui/clipboard: mark type as not available when there is no data, Michael Tokarev, 2024/02/21