qemu-trivial
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-trivial] [PATCH] cpu-exec.c: Correct comment about this file and i


From: 陳韋任
Subject: [Qemu-trivial] [PATCH] cpu-exec.c: Correct comment about this file and indentation cleanup
Date: Sat, 4 Feb 2012 22:39:24 +0800
User-agent: Mutt/1.5.21 (2010-09-15)

  Each target use #define marco (in target-xxx/cpu.h) to rename cpu_exec
(cpu-exec.c) to cpu_xxx_exec, then defines its own cpu_loop which calls
cpu_xxx_exec. So basically, cpu-exec.c is not i386 (only) emulator main
execution loop. This patch correctes the comment of this file and does
indentation cleanup.

Signed-off-by: Chen Wei-Ren (陳韋任) <address@hidden>
---
 cpu-exec.c |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/cpu-exec.c b/cpu-exec.c
index a9fa608..f7f19f5 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -1,5 +1,5 @@
 /*
- *  i386 emulator main execution loop
+ *  emulator main execution loop
  *
  *  Copyright (c) 2003-2005 Fabrice Bellard
  *
@@ -304,7 +304,7 @@ int cpu_exec(CPUState *env)
                             env->hflags2 |= HF2_NMI_MASK;
                             do_interrupt_x86_hardirq(env, EXCP02_NMI, 1);
                             next_tb = 0;
-                       } else if (interrupt_request & CPU_INTERRUPT_MCE) {
+                                         } else if (interrupt_request & 
CPU_INTERRUPT_MCE) {
                             env->interrupt_request &= ~CPU_INTERRUPT_MCE;
                             do_interrupt_x86_hardirq(env, EXCP12_MCHK, 0);
                             next_tb = 0;
@@ -390,7 +390,7 @@ int cpu_exec(CPUState *env)
                                 next_tb = 0;
                             }
                         }
-                   }
+                               }
 #elif defined(TARGET_ARM)
                     if (interrupt_request & CPU_INTERRUPT_FIQ
                         && !(env->uncached_cpsr & CPSR_F)) {
@@ -429,7 +429,7 @@ int cpu_exec(CPUState *env)
                     {
                         int idx = -1;
                         /* ??? This hard-codes the OSF/1 interrupt levels.  */
-                       switch (env->pal_mode ? 7 : env->ps & PS_INT_MASK) {
+                                   switch (env->pal_mode ? 7 : env->ps & 
PS_INT_MASK) {
                         case 0 ... 3:
                             if (interrupt_request & CPU_INTERRUPT_HARD) {
                                 idx = EXCP_DEV_INTERRUPT;
@@ -562,7 +562,7 @@ int cpu_exec(CPUState *env)
                 barrier();
                 if (likely(!env->exit_request)) {
                     tc_ptr = tb->tc_ptr;
-                /* execute the generated code */
+                    /* execute the generated code */
                     next_tb = tcg_qemu_tb_exec(env, tc_ptr);
                     if ((next_tb & 3) == 2) {
                         /* Instruction counter expired.  */
-- 
1.7.3.5



reply via email to

[Prev in Thread] Current Thread [Next in Thread]