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Re: [Qemu-trivial] [Qemu-devel] [PATCH] target-openrisc: bugfixes for de


From: Peter Maydell
Subject: Re: [Qemu-trivial] [Qemu-devel] [PATCH] target-openrisc: bugfixes for debugging with GDB+Qemu on OpenRISC
Date: Mon, 5 Jan 2015 18:33:39 +0000

On 5 January 2015 at 18:15, Peter Maydell <address@hidden> wrote:
> On 18 December 2014 at 00:26, David Morrison <address@hidden> wrote:
>> --- a/target-openrisc/cpu.h
>> +++ b/target-openrisc/cpu.h
>> @@ -20,6 +20,7 @@
>>  #ifndef CPU_OPENRISC_H
>>  #define CPU_OPENRISC_H
>>
>> +#define TARGET_HAS_ICE
>>  #define TARGET_LONG_BITS 32
>>  #define ELF_MACHINE    EM_OPENRISC
>
> This looks like a correct change

...actually, on second thought, we should do this the other way
round and just get rid of TARGET_HAS_ICE altogether. The only
two targets which don't define it are openrisc and unicore32,
and both of those actually do have the breakpoint handling code,
so failing to define it was just a bug. I'll cook up a patch...

-- PMM



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