Re: [Qemu-trivial] [Qemu-devel] [PATCH] target-tricore: fix depositing bits from PCXI into ICR

[Bastian Koppelmann]

On 06/24/2015 02:01 PM, Paolo Bonzini wrote:
> Spotted by Coverity, because (env->PCXI & MASK_PCXI_PCPN) >> 24
> is always zero.  The immediately preceding assignment is also
> wrong though.
>
> Signed-off-by: Paolo Bonzini <address@hidden>
> ---
>   target-tricore/op_helper.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target-tricore/op_helper.c b/target-tricore/op_helper.c
> index 10ed541..53edbda 100644
> --- a/target-tricore/op_helper.c
> +++ b/target-tricore/op_helper.c
> @@ -2545,10 +2545,10 @@ void helper_rfm(CPUTriCoreState *env)
>       env->PC = (env->gpr_a[11] & ~0x1);
>       /* ICR.IE = PCXI.PIE; */
>       env->ICR = (env->ICR & ~MASK_ICR_IE) |
> -               ((env->PCXI & ~MASK_PCXI_PIE) >> 15);
> +               ((env->PCXI & MASK_PCXI_PIE) >> 15);
>       /* ICR.CCPN = PCXI.PCPN; */
>       env->ICR = (env->ICR & ~MASK_ICR_CCPN) |
> -               ((env->PCXI & ~MASK_PCXI_PCPN) >> 24);
> +               ((env->PCXI & MASK_PCXI_PCPN) >> 24);
>       /* {PCXI, PSW, A[10], A[11]} = M(DCX, 4 * word); */
>       env->PCXI = cpu_ldl_data(env, env->DCX);
>       psw_write(env, cpu_ldl_data(env, env->DCX+4));
Thanks, applied it to my tricore-next branch.

Cheers,
Bastian