Re: [Qemu-trivial] [PATCH v4 08/11] qemu-log: dfilter-ise exec, out_asm, and op_opt

[Aurelien Jarno]

On 2015-08-03 10:14, Alex Bennée wrote:
> This ensures the code generation debug code will honour -dfilter if set.
> For the "exec" tracing I've added a new inline macro for efficiency's
> sake. I've not touched CPU_LOG_TB_OP as this is buried in each
> individual target.
> 
> Signed-off-by: Alex Bennée <address@hidden>
> 
> ----
> 
> v2
>    - checkpatch updates
>    - add qemu_log_mask_and_addr macro for inline dump for traces
>    - re-base on re-factored tcg layout
>    - include new Trace & Link lines
> ---
>  cpu-exec.c              | 13 +++++++------
>  include/exec/exec-all.h |  8 +++++---
>  include/qemu/log.h      | 15 +++++++++++++++
>  tcg/tcg.c               |  6 ++++--
>  translate-all.c         |  3 ++-
>  5 files changed, 33 insertions(+), 12 deletions(-)
> 
> diff --git a/cpu-exec.c b/cpu-exec.c
> index a039f1a..d01d08e 100644
> --- a/cpu-exec.c
> +++ b/cpu-exec.c
> @@ -181,8 +181,9 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, 
> TranslationBlock *itb)
>      uintptr_t next_tb;
>      uint8_t *tb_ptr = itb->tc_ptr;
>  
> -    qemu_log_mask(CPU_LOG_EXEC, "Trace %p [" TARGET_FMT_lx "] %s\n",
> -                  itb->tc_ptr, itb->pc, lookup_symbol(itb->pc));
> +    qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
> +                           "Trace %p [" TARGET_FMT_lx "] %s\n",
> +                           itb->tc_ptr, itb->pc, lookup_symbol(itb->pc));
>  
>  #if defined(DEBUG_DISAS)
>      if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
> @@ -213,10 +214,10 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState 
> *cpu, TranslationBlock *itb)
>           */
>          CPUClass *cc = CPU_GET_CLASS(cpu);
>          TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
> -        qemu_log_mask(CPU_LOG_EXEC,
> -                      "Abandoned execution of TB chain before %p ["
> -                      TARGET_FMT_lx "] %s\n",
> -                      itb->tc_ptr, itb->pc, lookup_symbol(itb->pc));
> +        qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
> +                               "Abandoned execution of TB chain before %p ["
> +                               TARGET_FMT_lx "] %s\n",
> +                               itb->tc_ptr, itb->pc, lookup_symbol(itb->pc));
>          if (cc->synchronize_from_tb) {
>              cc->synchronize_from_tb(cpu, tb);
>          } else {
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index 361d3d2..51276ab 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -282,9 +282,11 @@ static inline void tb_add_jump(TranslationBlock *tb, int 
> n,
>  {
>      /* NOTE: this test is only needed for thread safety */
>      if (!tb->jmp_next[n]) {
> -        qemu_log_mask(CPU_LOG_EXEC, "Linking TBs %p [" TARGET_FMT_lx
> -                      "] index %d -> %p [" TARGET_FMT_lx "]\n",
> -                      tb->tc_ptr, tb->pc, n, tb_next->tc_ptr, tb_next->pc);
> +        qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc,
> +                               "Linking TBs %p [" TARGET_FMT_lx
> +                               "] index %d -> %p [" TARGET_FMT_lx "]\n",
> +                               tb->tc_ptr, tb->pc, n,
> +                               tb_next->tc_ptr, tb_next->pc);
>          /* patch the native jump address */
>          tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc_ptr);
>  
> diff --git a/include/qemu/log.h b/include/qemu/log.h
> index ade1f76..0b0eef5 100644
> --- a/include/qemu/log.h
> +++ b/include/qemu/log.h
> @@ -77,6 +77,21 @@ qemu_log_vprintf(const char *fmt, va_list va)
>          }                                               \
>      } while (0)
>  
> +/* log only if a bit is set on the current loglevel mask
> + * and we are in the address range we care about:
> + * @mask: bit to check in the mask
> + * @addr: address to check in dfilter
> + * @fmt: printf-style format string
> + * @args: optional arguments for format string
> + */
> +#define qemu_log_mask_and_addr(MASK, ADDR, FMT, ...)    \
> +    do {                                                \
> +        if (unlikely(qemu_loglevel_mask(MASK)) &&       \
> +                     qemu_log_in_addr_range(ADDR)) {    \
> +            qemu_log(FMT, ## __VA_ARGS__);              \
> +        }                                               \
> +    } while (0)
> +
>  /* Special cases: */
>  
>  /* cpu_dump_state() logging functions: */
> diff --git a/tcg/tcg.c b/tcg/tcg.c
> index 587bd89..ed42204 100644
> --- a/tcg/tcg.c
> +++ b/tcg/tcg.c
> @@ -2305,7 +2305,8 @@ static inline int tcg_gen_code_common(TCGContext *s, 
> TranslationBlock *tb,
>       g_assert(tb->tc_size == 0 || search_pc > 0);
>  
>  #ifdef DEBUG_DISAS
> -    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {
> +    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP)
> +                 && qemu_log_in_addr_range(tb->pc))) {
>          qemu_log("OP:\n");
>          tcg_dump_ops(s);
>          qemu_log("\n");
> @@ -2332,7 +2333,8 @@ static inline int tcg_gen_code_common(TCGContext *s, 
> TranslationBlock *tb,
>  #endif
>  
>  #ifdef DEBUG_DISAS
> -    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) {
> +    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT)
> +                 && qemu_log_in_addr_range(tb->pc))) {
>          qemu_log("OP after optimization and liveness analysis:\n");
>          tcg_dump_ops(s);
>          qemu_log("\n");
> diff --git a/translate-all.c b/translate-all.c
> index e8072d8..facd516 100644
> --- a/translate-all.c
> +++ b/translate-all.c
> @@ -205,7 +205,8 @@ void cpu_gen_code(CPUArchState *env, TranslationBlock *tb)
>  
>      tb_write_perfmap(tb->tc_ptr, tb->tc_size, tb->pc);
>  #ifdef DEBUG_DISAS
> -    if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
> +    if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM) &&
> +        qemu_log_in_addr_range(tb->pc)) {
>          qemu_log("OUT: [size=%d]\n", tb->tc_size);
>          log_disas(tb->tc_ptr, tb->tc_size);
>          qemu_log("\n");
> -- 
> 2.5.0

Reviewed-by: Aurelien Jarno <address@hidden>

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
address@hidden                 http://www.aurel32.net