Re: [avr-gcc-list] gcc prolog incorrect?

[Ben L. Titzer]

On Mar 6, 2005, at 7:46 PM, Jeff Barlow wrote:

> "Ben L. Titzer" <address@hidden>  wrote:
>
> > The thing I wonder about is what happens if there is an interrupt
> > between 72 and 73....It seems to me that those two instructions should
> > be swapped...
>
> And your homework assignment is to read that part of the Atmel
> datasheet very carefully. Hint: we get one free.
>
> BTW, you're right about the interrupt enable flag being saved
> correctly.

Oh no! Trick question--neither the datasheet nor the instruction set 
specification directly answers this question. The answer is buried in 
the pipeline description and the cycle counts of the respective 
instructions--i.e. when 72 is executing, 73 is already being fetched, 
and since the I flag was disabled by the CLI previously, there will be 
no interrupts between 72 and 73 because the effect of 72 isn't checked 
until 74 is being fetched...

Wonderful. I guess I am going to have to fix this in Avrora with some 
ugly kludge...

And here I thought the pipeline was not visible above the 
micro-architecture level....thanks Atmel.

> --
> Later,
> Jeff
>
>
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