RE: [avr-gcc-list] gcc signal overhead, redundant code, bug (?), far from optimal

[Szikra Istvan]

Thank You for the fast response, but I'm not sure if I understand you right.

INTERRUPTs can be interrupted (by other interrupts or signals) and SIGNALS
not.
When an interrupt (signal) occurs and the MCU starts handling it the MCU
disable interrupts automatically, (and the reti enables interrupts).  If we
want to make it pre-emptive (so others can interrupt it) we need to
re-enable interrupts. 

This is what interrupt produces:

129:rs422coax.c   **** INTERRUPT(SIG_OUTPUT_COMPARE3A)
 130:rs422coax.c   **** {
138                     /* prologue: frame size=0 */
 139 003c 7894                  sei
 140 003e 1F92                  push __zero_reg__
 141 0040 0F92                  push __tmp_reg__
 142 0042 0FB6                  in __tmp_reg__,__SREG__
 143 0044 0F92                  push __tmp_reg__
 144 0046 1124                  clr __zero_reg__
 145 0048 8F93                  push r24
 146                    /* prologue end (size=7) */
 131:rs422coax.c   ****     DPA1(0);
149 004a D998                   cbi 59-0x20,1
 132:rs422coax.c   ****     FLAG_Timer_1s = 1;
152 004c 81E0                   ldi r24,lo8(1)
 153 004e 8093 0000             sts FLAG_Timer_1s,r24
 133:rs422coax.c   ****     DPA1(1);
156 0052 D99A                   sbi 59-0x20,1
 157                    /* epilogue: frame size=0 */
 158 0054 8F91                  pop r24
 159 0056 0F90                  pop __tmp_reg__
 160 0058 0FBE                  out __SREG__,__tmp_reg__
 161 005a 0F90                  pop __tmp_reg__
 162 005c 1F90                  pop __zero_reg__
 163 005e 1895                  reti
 164                    /* epilogue end (size=6) */
 165                    /* function __vector_26 size 18 (5) */

So it is worse than before (with 1 word | tick)
You can see the sei instruction at the beginning of the prologue, which
enables global interrupt.

So this not helps at all.

And 1 more thing I forgot to mention before: I also tried optimization 3, 2
instead of s (size). 

OPT = 3 produces:
182                     /* prologue: frame size=0 */
 183 006a 1F92                  push __zero_reg__
 184 006c 0F92                  push __tmp_reg__
 185 006e 0FB6                  in __tmp_reg__,__SREG__
 186 0070 0F92                  push __tmp_reg__
 187 0072 1124                  clr __zero_reg__
 188 0074 2F93                  push r18
 189 0076 3F93                  push r19
 190 0078 4F93                  push r20
 191 007a 5F93                  push r21
 192 007c 6F93                  push r22
 193 007e 7F93                  push r23
 194 0080 8F93                  push r24
 195 0082 9F93                  push r25
 196 0084 AF93                  push r26
 197 0086 BF93                  push r27
 198 0088 EF93                  push r30
 199 008a FF93                  push r31
 200                    /* prologue end (size=17) */    

Instead of OPT = s:
176                     /* prologue: frame size=0 */
 177 005e 1F92                  push __zero_reg__
 178 0060 0F92                  push __tmp_reg__
 179 0062 0FB6                  in __tmp_reg__,__SREG__
 180 0064 0F92                  push __tmp_reg__
 181 0066 1124                  clr __zero_reg__
 182 0068 2F93                  push r18
 183 006a 3F93                  push r19
 184 006c 4F93                  push r20
 185 006e 8F93                  push r24
 186 0070 9F93                  push r25
 187 0072 EF93                  push r30
 188 0074 FF93                  push r31
 189                    /* prologue end (size=12) */

So for the frequently used part of the interrupt the speed optimized is in
fact slower than the size optimized. :) :| :( 

All my questions still remain!

Thx,
Istvan Szikra

> -----Original Message-----
> From: David Kelly [mailto:address@hidden
> Sent: 2005. augusztus 18. 17:52
> To: Szikra Istvan
> Cc: address@hidden
> Subject: Re: [avr-gcc-list] gcc signal overhead, redundant code, bug (?),
> far from optimal
> 
> On Thu, Aug 18, 2005 at 04:05:25PM +0200, Szikra Istvan wrote:
> > I have problem with avr-gcc generated "long-winded" assembly code.
> > What I'm trying to write is time critical, so these unnecessary
> instructions
> > do matter. (it it also large, so I don't intend to write everything in
> asm)
> >
> > I have some signal, one of them is this:
> > [c source]
> > SIGNAL(SIG_OUTPUT_COMPARE3A)
> > {
> >     DPA1(0);   ///<debug
> >     FLAG_Timer_1s = 1;
> >     DPA1(1);   ///<debug
> > }
> > [/c source]
> 
> [...]
> 
> > This is awfully lot code.
> >  First of all, why clear __zero_reg__ ? It is NOT used in the interrupt.
> > Hell why push, clr, pop, isn't supposed zero be in it anyway? So I'm not
> > sure this push, clr, pop is needed in any interrupt, but im sure it is
> not
> > in this.
> >
> > Am I missing something?
> 
> [snip]
> 
> Yes, I think so. Use INTERRUPT rather than SIGNAL. All the stack work,
> register preparation, and SREG stuff is to make the routine safe to
> re-enable IRQ that it could be pre-empted.
> 
> Use INTERRUPT and your handler will run with interrupts disabled but spend
> less time in preamble and postamble.
> 
> --
> David Kelly N4HHE, address@hidden
> ========================================================================
> Whom computers would destroy, they must first drive mad.