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[Bug binutils/30099] objdump riscv: stop disassembling addi rd, rs, 0 wi
From: |
nelsonc1225 at sourceware dot org |
Subject: |
[Bug binutils/30099] objdump riscv: stop disassembling addi rd, rs, 0 with a relocation as mv rd, rs |
Date: |
Thu, 09 Feb 2023 02:42:07 +0000 |
https://sourceware.org/bugzilla/show_bug.cgi?id=30099
--- Comment #2 from Nelson Chu <nelsonc1225 at sourceware dot org> ---
Some minor issues for implementation,
* I like the idea from Maciej to define a new instruction type, INSN_NORELOC,
in the opcode table. But seems like we didn't left enough encodings for
INSN_TYPE, so the values of new types cannot be continuous with other old
types. I just randomly choose 0x20000000 temporarily, maybe we should redefine
them to preserve enough encodings for future extend? or just extend them from
0x20000000 down?
* Not sure if it causes problems when we enable info->disassembler_needs_relocs
in the disassemble_init_for_target. The INSN_HAS_RELOC needs
info->disassembler_needs_relocs be enabled. But I only see arc enable it for
now, so not sure what the consequences are.
Otherwise, applying the proposed patch, I can get the expected result,
% cat tmp.s
foo:
addi a0, a1, %lo(foo)
addi a0, a1, 10
addi a0, a1, 0
mv a0, a1
% riscv64-unknown-elf-as tmp.s -o tmp.o
% riscv64-unknown-elf-objdump -d tmp.o
tmp.o: file format elf64-littleriscv
Disassembly of section .text:
0000000000000000 <foo>:
0: 00058513 add a0,a1,0
4: 00a58513 add a0,a1,10
8: 00058513 mv a0,a1
c: 00058513 mv a0,a1
% riscv64-unknown-elf-objdump -d -Mno-aliases tmp.o
tmp.o: file format elf64-littleriscv
Disassembly of section .text:
0000000000000000 <foo>:
0: 00058513 addi a0,a1,0
4: 00a58513 addi a0,a1,10
8: 00058513 addi a0,a1,0
c: 00058513 addi a0,a1,0
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