[Bug binutils/32368] New: RISCV Generalized Reverse like grev, grevi, etc are not supported

[akhilesh.k at samsung dot com]

https://sourceware.org/bugzilla/show_bug.cgi?id=32368

            Bug ID: 32368
           Summary: RISCV Generalized Reverse like grev, grevi, etc are
                    not supported
           Product: binutils
           Version: 2.43
            Status: NEW
          Severity: normal
          Priority: P2
         Component: binutils
          Assignee: unassigned at sourceware dot org
          Reporter: akhilesh.k at samsung dot com
  Target Milestone: ---

Initially I reported this issue in gcc which is redirected to asm

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117604

---- details ----
During bit manipulation verification I observed "grevw, greviw" and some more 
instructions are not implemented.

https://raw.githubusercontent.com/riscv/riscv-bitmanip/master/bitmanip-draft.pdf

Seems Generalized Reverse (grev, grevi, rev) are not supported in 2.43  

Generalized Reverse is not described in Bit manipulation manual
riscv-bitmanip-1.0.0.pdf but in previous versions like 0.92 described in
detail.  

Is Generalized Reverse feature under development ?

I am using gcc-14.1/binutils 2.43 release and used
https://github.com/riscv/riscv-crypto performance tool as bit manipulation
verification.



/home/akhilesh.k/Toolchains/vd/gcc-14//bin/riscv64-none-linux-gnu-gcc -Wall
-I/home/akhilesh.k/git/riscv-crypto/build/benchmarks/rv64-zscrypto/include
-I/home/akhilesh.k/git/riscv-crypto/build/benchmarks/rv64-zscrypto/include/riscvcrypto/share
-O3 -march=rv64gcvzba_zbb_zbc_zbs_zknd_zkne_zksed_zknh_zbkb  -mabi=lp64d
-D__ZSCRYPTO=1 -c -o
/home/akhilesh.k/git/riscv-crypto/build/benchmarks/rv64-zscrypto/obj/sm3/reference/sm3.o
sm3/reference/sm3.c
/home/akhilesh.k/git/riscv-crypto/build/benchmarks/rv64-zscrypto/include/riscvcrypto/share/rvintrin.h:
Assembler messages:
/home/akhilesh.k/git/riscv-crypto/build/benchmarks/rv64-zscrypto/include/riscvcrypto/share/rvintrin.h:151:
Error: unrecognized opcode `greviw t3,t3,24'
/home/akhilesh.k/git/riscv-crypto/build/benchmarks/rv64-zscrypto/include/riscvcrypto/share/rvintrin.h:151:
Error: unrecognized opcode `greviw t4,t4,24'
/home/akhilesh.k/git/riscv-crypto/build/benchmarks/rv64-zscrypto/

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