|Subject:||Hot Openings-Bay Area 10-22|
|Date:||Fri, 24 Oct 2003 08:59:59 -0400|
Hi Here is my contact
info along with some HOT Job Descriptions in the Bay area. Please also pass to
your friends who are looking.... Talk to you soon
You will be
responsible for chipsets, reference designs, and software solutions for
high-speed wireless applications in a variety of market segments. Specific
duties will include the following:
SENIOR DESIGN ENGINEER
Chip level signal integrity engineer (Could be 150k or greater package)
Define, specify, test, and debug high speed single-ended and differential I/O for a given bandwidth requirement (predriver, on-chip decoupling, termination, physical design rules, etc.). Develop on-chip power and noise management techniques. Thorough clocking and timing analysis of I/O interface. Work with PLL/DLL/PDB (programmable delay block) design/implementation, SerDes, XAUI interfaces
Must have transistor level circuit design background and knowledge of standard interfaces (HSTL, SSTL, LVDS, CML). Must know common high speed I/O design techniques (deskew, equalization, PVT compensation). Knowledge of semiconductor processes and ASIC technologies. Must have lab experience and knowledge of how to run HSPICE, Spectre. Able to work independently. Good communication skills for working with vendors and design teams
Requires MSEE/CS combined with 5-7 years of related experience, or BSEE/CS combined with 7-10+ yrs related experience.
Staff, Senior Staff or Principle Engineer role. Responsible for supporting all back-end CAD functions. Front-end experience is a plus.
SR. STAFF DESIGN ENGINEER
Design of analog and mixed signal integrated circuits, including linear and switching power supply devices, and mixed-mode power and thermal management system Ics
Define new products, working closely with Marketing, Applications, and customers. As lead Design Engineer, create new product schematics, perform simulations, and validate silicon. Supervise physical layout of chip. Participate in cross-functional development teams from product definition to production release
Minimum 8 years semiconductor industry experience, designing high precision analog and switched cap circuits in sub-micron CMOS technologies. Expertise using automated design tools (Cadence preferred). Must have successfully market released at least 5 products. BSEE required, MSEE preferred
You will work closely with Design/Test and Manufacturing groups to coordinate the introduction of new products. Will be responsible for monitoring yield trends, analyzing and determining yield limiters and continuously improving product yields. Responsibilities will also include product characterization of skew lots; WAT data analysis; determining test/design margins and establishing data sheet parameter limits. You will work with design, test and applications groups to resolve customer returns. Will work with off-shore manufacturing partners to facilitate production release and transfer of new products to high volume manufacturing
Must have a BSEE degree with a MSEE preferred and 3-5 years of direct semiconductor experience in a product engineering/yield analysis and enhancement role. Teradyne/Catalyst ATE experience is desirable. Must have excellent communication skills, enjoy working in a team environment and be able to be effective in a fabless semiconductor environment. Should have a good background in driving projects to completion and must be able to work with minimal supervision
DEVICE TECHNOLOGY ENGINEER
Responsible for designing, developing, and optimizing memory cells used in high speed SRAM arrays
Interface with process integration, circuit design, and layout engineers
We are seeking an experienced engineer to ensure our European customers success at designing and using Company products. The Candidate will be expected to support external engineering resources in-region as well as other design partners globally. Will be responsible for replicating customer issues as identified by field application engineering and opening bugs if needed. You will own the internal resolution/escalation for the reported issues until an agreeable resolution is found. Must have a demonstrated ability at linking a partners design activity to internal engineering, sales and product management teams. Will be required to create Support Bulletins and Application Notes to help answer technical product and implementation questions from customers. Will be responsible for holding quarterly technical training sessions for Field Application Engineers, providing them with updates on Company technology, product features and function, as well as other tools required to assist in accelerating customer adoption, debug and revenue
possess a BSCS (MSCS preferred) with 8+ years of experience. Must have
experience in network related semiconductor business as well as 2-3 years supporting
European customers in at least France, Germany, UK and The Netherlands. Ideal
candidates should have a strong understanding of wireless LANs, current
shipping PC Operating Systems(including Linux), as well as 3+ years experience
in device driver and/or embedded development. Excellent communications skills
in English are required and fluency in any of the native (Non-English)
languages of the noted countries above is highly desirable. Experienced in
using the latest debugging tools and demonstrated ability in the processes of
FIELD APPLICATIONS ENGINEER
Requires self-directed leadership of design-in effort
at Major OEM, resolution of Technical issues, Must have knowledge of Frequency
Synthesis, PLLs, jitter specs and have an existing knowledge and relationship
with Strategic Bay Area accounts.
SR. DIGITAL VERIFICATION ARCHITECT
Join our team
of engineers responsible for the specification, design, and verification of the
next generation of wireless networking ASICs. This position requires a team
player to work with our architects and designers to explore ideas for our next
generation products and then develop simulation environments to exercise
hardware and software in ways we have not yet anticipated.
DESIGN ENGINEERING MANAGER
Job Responsibilities: Major responsibilities include leading the micro-architecture development effort & management of a design team responsible for RTL design, block level verification, synthesis, formal verification & timing closure.
Job Requirements: Proven track record with micro-architecture development for high complexity sub-micron SoC developments including use of design tools such as Verilog, Synopsis/Ambit, DFT & timing closure tools. Must be proficient in RTL design, ASIC design flows including working with the physical design team for layout, timing closure & final chip tapeout. Management & leadership skills must include experience with recruiting, management & technical guidance for team members. Strong communication skills required with the ability to work in a team environment. Domain knowledge in networking protocols such as Ethernet, MPLS & ATM is required.
Education: MSEE with 8+ yrs experience in RTL & ASIC/SoC development
I/O & ANALOG CIRCUIT DESIGNER
Staff, Senior Staff or Principle Engineer role. Responsible for high speed TTL, LVTTL, HSTL and other higher speed I/O buffers, ESD, on-chip termination, and related analog & logic function blocks design
We require a hands-on manager to manage a highly experienced team developing software for a Wireless Local Area Network bridge product. The manager of this team will be expected to contribute on product strategy, create development plans to meet that strategy and to manage the execution of that plan. In addition, the manager will be expected to contribute to the development on an as needed basis. Experience of developing and managing development of networking products, such as bridges, switches, routers etc, is required. The successful candidate will have experience of embedded system development, RTOS, embedded microprocessors, networking hardware, TCP/IP and other commonly used LAN protocols. Experience of Wireless Local Area Networking, especially IEEE 802.11, will be valued very highly. Greater than 12 years of development experience, with greater than 4 years as a manager, and a bachelors or masters computer science or EE degree is required
SR. DEVICE DRIVER SOFTWARE ENGINEER
Develop device driver software fro USB, Ethernet, IEEE 802.11a,
802.11b, and 802.3. Write software for the implementation of MAC protocol in
conjunction with Windows device drivers. Familiar with the Window DDK/WinDBG
environment for NDIS development. Develop C/C++ software for real-time embedded
systems and Window platforms through 802.11 MAC protocol. Knowledge of UML
design is a plus.
PACKAGE DESIGN ENGINEER
5-7 Years Experience
Amkor, ChipPAC, ASAT,
CIRCUIT DESIGN ENGINEER
· · Team Leader: Senior Staff or Principle Engineer role. Responsible for designing very high performance memory cores, other high performance blocks and complete chips.
SR. VERIFICATION ENGINEER
· We are looking for a Verification Engineer with 8-10 years of experience in verifying complex ICs. You will be involved in both chip-level and block/unit-level verification. Responsibilities also include chip level integration and IC backend support.
SENIOR ANALOG DESIGN ENGINEER
ANALOG RFIC DESIGN ENGINEER
Design analog, mixed-signal
and radio frequency circuits for an integrated CMOS transceiver. Circuits may
include amplifiers, filters, data converters, phase locked loops,
switched-capacitor circuits, power amplifiers, low noise amplifiers, and
SOFTWARE ENGINEER NDIS Experience
SR. MIXED SIGNAL IC DESIGN ENGINEER
Focus will be the development of ICs for radio frequency identification (RFID) tags. Participate in product definition and formulation of strategies to achieve device performance goals and cost targets. Work cooperatively in a team of system engineers, IC designers, technology partners, test engineers, manufacturing engineers and process developers. Incorporate silicon into low cost, high volume products. This technology presents designers with exciting new opportunities to change the rules of silicon circuit realization.
Must have an understanding of solid-state devices, semiconductor processing, and experience in the design of MOS and bipolar transistors. Strong analog and digital design skills are required. Candidate will have successfully completed several mixed-signal IC designs, and will be expert in the used of CAD tools (e.g., Cadence, Mentor, or Tanner). An understanding of RF semiconductor design is required. Must be experienced in the design of low voltage / low power IC’s, and be familiar with parasitic effects in IC design. Candidate should be familiar with communication systems design
Candidate should have a BS or higher degree in electrical engineering or solid-state physics. A minimum of 4 years experience in mixed-signal IC design is essential. Design of RFID devices or systems is a strong plus
PRODUCT MARKETING ENGINEER
Identify and exploit new market opportunities for assigned region and applications. Develop, define and support new product definitions and introductions. Generate thorough and timely marketing collateral and training, including datasheets and application notes. Visit customer’s engineering sites, assist in the design-win process. Work with design and Product/Test engineer groups to accelerate product development and release cycle.
5 years or less as a semiconductor product engineer, application engineer or product marketing engineer. BSEE a must, MBA or MSEE a plus. Must also have exceptional verbal and written skills. Understanding of PLLs and/or CMOS mixed signal devices a plus. Must be able to use basic lab equipment, such as high speed Oscilloscope and Spectrum analyzer.
You will be responsible for new product introduction, working closely with design engineers to ensure product manufacturability. This will include process technology, package selection, yield and cost estimates. Will be responsible for establishing product data sheet parameter limits and ATE program test limits. Will handle product characterization with process skew lots over voltage and temperature ranges as specified in data sheets. You will work directly with the fab and design engineering for any corrective actions. Will have responsibility for continuously improving both wafer sort and final test yield, focusing on reducing product costs and test times. You will also support any RMA's includng verification, failure analysis, corrective action and issue final report and recommendations.
Must have a BS degree with a MS preferred and 10 - 15 years of direct semiconductor experience. The ideal candidate will have a strong background in semiconductor design and fabrication in 0.18 and 0.13 um CMOS. Should have good understanding of mixed-signal semiconducter IC product engineering and be experienced in wafer fabrication and assembly/test foundries. Must have a broad understanding of product operations including product test, quality, reliability, manufacturing logistics and be familiar with package technology, especially LPCC/QFN and BGQ. Prior experience in "start-up" environment and high volume production is a plus. Must have excellent communication skills, enjoy working in a team environment and be able to be effective in a fabless semiconductor environment
PRODUCT ENGINEER/ IC CHARACTERIZATION ENGINEER
Requires BSEE and 0-8 years experience, and strong lab skills.
Candidates for this position must be experienced in the use of bench-top lab equipment to characterize IC devices. Preference will be given to candidates with extensive experience in the use of oscilloscope, time interval analyzer, curve tracer, and spectrum analyzer to characterize phase-lock-loop devices (PLLs), and clock distribution devices. Experience characterizing IC devices using digital vectors and/or ATE systems is not relevant and will not be considered for this position. Additional preference will be given to candidates with experience writing software to automate bench characterization using LabVIEW, or Visual C++.
Strong written and verbal communication skills required
You will be responsible for performing board level failure analysis to support RMA and customer issues. Responsibilities include debugging and verifying functionality of AC/DC and DC/DC switch mode power supply (SMPS) modules to identify root causes of failure investigations. Advise customers regarding corrective actions based on the results of analysis.
Hands-on experience with AC/DC switch mode power supply testing and analysis. Knowledge of AC/DC power supply design, transformer design, familiarity with CMOS and bi-polar integrated circuit products. Must have demonstrated ability to work with customers.
SENIOR ANALOG DESIGN ENGINEER
looking for a Sr. Analog Design Engineer to be responsible for the design of a new range of PWM Mixed Signal MOS circuits. A broad range of experience in PWM and HV CMOS designs will be necessary in this position. Knowledge of PLL design and ADCs a plus. The candidate must have a proven track record, good communication skills and be able to understand HV CMOS layout. QUALIFICATIONS: Candidates must have a BS degree in Electrical Engineering , MS preferred, and a minimum of 6 years in design with product introduction into manufacturing. Also required is fluency in Spice and PC/ UNIX workstations.
APPLICATION ENGINEER 80-140K
Experience in signal integrity on PC motherboards and IC PLL design
In depth knowledge of transmission line theory and PCB Design for control of noise and EMI
Must be able to lab equipment: scopes, spectrum analyzer, time domain analyzer
Would like BSEE or MSEE 5-10 Years Experience
CORPORATE APPLICATIONS ENGINEER
The goal of this position is to help develop Product Business Unit’s next-generation analog ICs. The successful candidate will be knowledgeable in analog ICs, mixed-signal ICs, and have experience in board level design. The candidate should also have good communication skills and be willing to do limited travel.
More specific duties include writing new product definitions, communicating/coaching FAEs in their new products, writing application notes/articles/design ideas, and assist design engineers in generating new product specifications. The corporate applications engineer will find it exciting evaluating new ideas, studying new concepts, pulling the ideas into definitions and supporting his definition from concept to a finished silicon product.
The ideal candidate would be a board level designer with at least BSEE, 5 years of experience, analog design expertise, and some microcontroller exposure. This is a very exciting opportunity at a company famous for its fast-paced new product innovation and the highest caliber engineers in the industry.
CORPORATE APPLICATIONS ENGINEER- Clock Synthesis & Distribution Products
CORPORATE APPLICATIONS ENGINEER- Consumer Products
CORPORATE APPLICATIONS ENGINEER- Storage Area Networks
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