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Bug in as for aarch64?
From: |
Jacob Navia |
Subject: |
Bug in as for aarch64? |
Date: |
Wed, 28 Jul 2021 19:33:11 +0200 |
Dear Friends:
The instruction:
ldr d15,=0x401acccccccc
will be assembled without any warnings. The pool will be correctly constructed
and linked, and the correct value is stored in the pool after the current
function. The value 0x401acccccccc corresponds to 6.7
At run-time it will not work, the register d15 is loaded with some value that
doesn’t correspond at all to the given one.
If I write however
ldr x15,=0x401acccccccc
The 64 bit value value will be correctly loaded into x15.Both pools are exactly
the same.
The clang compiler does NOT assemble that instruction and emits an error:
error: Immediate too large for register
If I change it to x15, both gas and clang agree, and the result is correct.
Note that the address of the pool appears correct under gdb disassembler: it is
just at the position of the .ltorg pseudo instruction. I verified this by
displaying the contents of the pool.
as -v
GNU assembler version 2.28 (aarch64-linux-gnu) using BFD version (GNU Binutils
for Debian) 2.28
uname -a
Linux rock64 4.4.152-rockchip64 #1 SMP Sun Aug 26 14:40:54 CEST 2018 aarch64
GNU/Linux
Thanks in advance for your help.
jacob navia
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