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problem compiling guile on IA64 by Intel compiler
From: |
Sysoltsev, Vyatcheslav |
Subject: |
problem compiling guile on IA64 by Intel compiler |
Date: |
Tue, 24 Jun 2003 16:45:11 +0400 |
Hi there!
Because Intel compiler doesn't support asm inlines on IA64 I cannot compile
guile from sources on IA64 due to SCM_FENCE macro from libguile/__scm.h.
Here is this macro:
/* Anthony Green writes:
When the compiler sees...
DEFER_INTS;
[critical code here]
ALLOW_INTS;
...it doesn't actually promise to keep the critical code within the
boundries of the DEFER/ALLOW_INTS instructions. It may very well
schedule it outside of the magic defined in those macros.
However, GCC's volatile asm feature forms a barrier over which code is
never moved. So if you add...
asm ("");
...to each of the DEFER_INTS and ALLOW_INTS macros, the critical
code will always remain in place. asm's without inputs or outputs
are implicitly volatile. */
#ifdef __GNUC__
#define SCM_FENCE asm /* volatile */ ("")
#else
#define SCM_FENCE
#endif
So I'd change the condition
#ifdef __GNUC__
... to ...
#if defined(__GNUC__) && !(defined(__INTEL_COMPILER) && defined(__ia64))
In this case the code will be acceptable both with gcc and Intel compiler.
However as I understand from the comment defining SCM_FENCE to nothing is
dangerous because of the compiler optimization. If you've got a real problem
with it, let me know and I will cope with this further.
-- Slava Sysoltsev
----------------------------------------------------------------------------
----------------------
--- libguile/__scm.h.orig 2003-06-24 16:33:40.000000000 +0400
+++ libguile/__scm.h 2003-06-24 16:34:35.000000000 +0400
@@ -362,7 +362,7 @@
...to each of the DEFER_INTS and ALLOW_INTS macros, the critical
code will always remain in place. asm's without inputs or outputs
are implicitly volatile. */
-#ifdef __GNUC__
+#if defined(__GNUC__) && !(defined(__INTEL_COMPILER) && defined(__ia64))
#define SCM_FENCE asm /* volatile */ ("")
#else
#define SCM_FENCE
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