RE: FW: problem compiling guile on IA64 by Intel compiler

[Sysoltsev, Vyatcheslav]

There is intrinsic in Intel compiler: void __memory_barrier(void);
This intrinsic does not generate code, but it creates a barrier across which
the compiler will not schedule data access instructions. Is this what is
needed?
        --Slava

-----Original Message-----
From: Thien-Thi Nguyen [mailto:address@hidden
Sent: Wednesday, July 09, 2003 2:25 PM
To: Sysoltsev, Vyatcheslav
Cc: Briltz, Denis; address@hidden
Subject: Re: FW: problem compiling guile on IA64 by Intel compiler


   From: "Sysoltsev, Vyatcheslav" <address@hidden>
   Date: Wed, 9 Jul 2003 13:49:20 +0400 

   No, Intel compiler doesn't plan to support ia64 asm inlines in
   foreseeable future.

looking at __scm.h closely, i see the inline asm is just an
implementation detail of SCM_FENCE, but SCM_FENCE is important
anyway (having it be defined to be nothing is indeed dangerous).

so the question becomes: does the intel compiler have an alternate
method to guarantee ordering as required by SCM_FENCE?  sorry for
not asking this earlier, when you had said you would be willing to
dig into the issue.

thi