[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Commit-gnuradio] r3821 - usrp-hw/trunk/sym/generated
From: |
matt |
Subject: |
[Commit-gnuradio] r3821 - usrp-hw/trunk/sym/generated |
Date: |
Thu, 19 Oct 2006 13:11:05 -0600 (MDT) |
Author: matt
Date: 2006-10-19 13:11:05 -0600 (Thu, 19 Oct 2006)
New Revision: 3821
Added:
usrp-hw/trunk/sym/generated/xc9572xl-vq44-IO.src
usrp-hw/trunk/sym/generated/xc9572xl-vq44-PWR.src
usrp-hw/trunk/sym/generated/xil-plat-cable.src
Modified:
usrp-hw/trunk/sym/generated/Makefile
Log:
xilinx stuff
Modified: usrp-hw/trunk/sym/generated/Makefile
===================================================================
--- usrp-hw/trunk/sym/generated/Makefile 2006-10-19 07:17:37 UTC (rev
3820)
+++ usrp-hw/trunk/sym/generated/Makefile 2006-10-19 19:11:05 UTC (rev
3821)
@@ -145,7 +145,10 @@
mictor43-LA.sym \
tlk2XX1-PWR.sym \
tlk2XX1-RX.sym \
- tlk2XX1-TX.sym
+ tlk2XX1-TX.sym \
+ xil-plat-cable.sym \
+ xc9572xl-vq44-PWR.sym \
+ xc9572xl-vq44-IO.sym
Added: usrp-hw/trunk/sym/generated/xc9572xl-vq44-IO.src
===================================================================
--- usrp-hw/trunk/sym/generated/xc9572xl-vq44-IO.src
(rev 0)
+++ usrp-hw/trunk/sym/generated/xc9572xl-vq44-IO.src 2006-10-19 19:11:05 UTC
(rev 3821)
@@ -0,0 +1,93 @@
+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=yes
+sort_labels=no
+generate_pinseq=yes
+sym_width=2400
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20060906
+name=XC9572-VQ44-IO
+device=XC9572-VQ44
+refdes=U?
+footprint=VQ44
+description=Xilinx CPLD
+documentation=http://www.xilinx.com
+author=mettus
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+comment=Part 2 of 2
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel.
+# negation lines can be added with _Q_
+# if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr seq type style posit. net label
+#-----------------------------------------------------
+39 io line l IO_B1MC2
+40 io line l IO_B1MC5
+41 io line l IO_B1MC6
+42 io line l IO_B1MC8
+43 io line l IO_B1MC9/GCK1
+44 io line l IO_B1MC11/GCK2
+1 io line l IO_B1MC14/GCK3
+2 io line l IO_B1MC15
+3 io line l IO_B1MC17
+
+29 io line l IO_B2MC2
+30 io line l IO_B2MC5
+31 io line l IO_B2MC6
+32 io line l IO_B2MC8
+33 io line l IO_B2MC9/GSR
+34 io line l IO_B2MC11/GTS2
+36 io line l IO_B2MC14/GTS1
+37 io line l IO_B2MC15
+38 io line l IO_B2MC17
+
+5 io line r IO_B3MC2
+6 io line r IO_B3MC5
+7 io line r IO_B3MC8
+8 io line r IO_B3MC9
+12 io line r IO_B3MC11
+13 io line r IO_B3MC14
+14 io line r IO_B3MC15
+18 io line r IO_B3MC16
+16 io line r IO_B3MC17
+
+19 io line r IO_B4MC2
+20 io line r IO_B4MC5
+21 io line r IO_B4MC8
+22 io line r IO_B4MC11
+23 io line r IO_B4MC14
+27 io line r IO_B4MC15
+28 io line r IO_B4MC17
+
+9 in line b TDI
+24 out line b TDO
+11 in clk b TCK
+10 in line b TMS
Added: usrp-hw/trunk/sym/generated/xc9572xl-vq44-PWR.src
===================================================================
--- usrp-hw/trunk/sym/generated/xc9572xl-vq44-PWR.src
(rev 0)
+++ usrp-hw/trunk/sym/generated/xc9572xl-vq44-PWR.src 2006-10-19 19:11:05 UTC
(rev 3821)
@@ -0,0 +1,58 @@
+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=yes
+sort_labels=no
+generate_pinseq=yes
+sym_width=1400
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20060906
+name=XC9572-VQ44-PWR
+device=XC9572-VQ44
+refdes=U?
+footprint=VQ44
+description=Xilinx CPLD
+documentation=http://www.xilinx.com
+author=mettus
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+comment=Part 1 of 2
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel.
+# negation lines can be added with _Q_
+# if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr seq type style posit. net label
+#-----------------------------------------------------
+15 pwr line l VccINT
+35 pwr line l VccINT
+26 pwr line l VccIO
+
+4 pwr line r GND
+17 pwr line r GND
+25 pwr line r GND
Added: usrp-hw/trunk/sym/generated/xil-plat-cable.src
===================================================================
--- usrp-hw/trunk/sym/generated/xil-plat-cable.src
(rev 0)
+++ usrp-hw/trunk/sym/generated/xil-plat-cable.src 2006-10-19 19:11:05 UTC
(rev 3821)
@@ -0,0 +1,65 @@
+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=yes
+sort_labels=no
+generate_pinseq=yes
+sym_width=1400
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20060906
+name=XIL-PLAT-CABLE
+device=XIL-PLAT-CABLE
+refdes=J?
+footprint=HDR-2x7-2mm
+description=XIlinx Platform Cable Connector
+documentation=http://www.xilinx.com
+author=mettus
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+#comment=
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel.
+# negation lines can be added with _Q_
+# if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr seq type style posit. net label
+#-----------------------------------------------------
+1 pwr line r GND
+3 pwr line r GND
+5 pwr line r GND
+7 pwr line r GND
+9 pwr line r GND
+11 pwr line r GND
+13 pwr line r GND
+2 pwr line l Vref/Vref
+4 out line l PROG/TMS
+6 out line l CCLK/TCK
+8 in line l Done/TDO
+10 out line l Din/TDI
+12 in line l NC/NC
+14 io line l INIT/NC
\ No newline at end of file
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- [Commit-gnuradio] r3821 - usrp-hw/trunk/sym/generated,
matt <=