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[Commit-gnuradio] r5930 - in gnuradio/branches/developers/jcorgan/sar: g
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From: |
jcorgan |
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Subject: |
[Commit-gnuradio] r5930 - in gnuradio/branches/developers/jcorgan/sar: gr-sar-fe/src/fpga/lib gr-sar-fe/src/fpga/tb gr-sar-fe/src/fpga/top gr-sar-fe/src/python usrp/firmware/include |
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Date: |
Tue, 10 Jul 2007 14:13:40 -0600 (MDT) |
Author: jcorgan
Date: 2007-07-10 14:13:40 -0600 (Tue, 10 Jul 2007)
New Revision: 5930
Added:
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar_config.vh
Modified:
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar.v
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar_control.v
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar_tx.v
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/tb/sar_tb.sav
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/tb/sar_tb.v
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/top/usrp_sar.rbf
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/python/sar.py
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/python/usrp_sar.py
gnuradio/branches/developers/jcorgan/sar/usrp/firmware/include/fpga_regs_standard.h
gnuradio/branches/developers/jcorgan/sar/usrp/firmware/include/fpga_regs_standard.v
Log:
Work in progress.
Modified: gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar.v
===================================================================
--- gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar.v
2007-07-10 17:09:06 UTC (rev 5929)
+++ gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar.v
2007-07-10 20:13:40 UTC (rev 5930)
@@ -19,8 +19,7 @@
// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA
//
-`include "../../../../usrp/firmware/include/fpga_regs_common.v"
-`include "../../../../usrp/firmware/include/fpga_regs_standard.v"
+`include "../lib/sar_config.vh"
module sar(clk_i,saddr_i,sdata_i,s_strobe_i,
tx_strobe_i,tx_dac_i_o,tx_dac_q_o,
Added:
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar_config.vh
===================================================================
---
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar_config.vh
(rev 0)
+++
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar_config.vh
2007-07-10 20:13:40 UTC (rev 5930)
@@ -0,0 +1,31 @@
+// -*- verilog -*-
+//
+// USRP - Universal Software Radio Peripheral
+//
+// Copyright (C) 2007 Corgan Enterprises LLC
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 2 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program; if not, write to the Free Software
+// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA
+//
+
+`include "../../../../usrp/firmware/include/fpga_regs_common.v"
+`include "../../../../usrp/firmware/include/fpga_regs_standard.v"
+
+`define FR_SAR_MODE `FR_USER_0
+`define bmFR_SAR_MODE_RESET 32'h0001
+`define bmFR_SAR_MODE_TX 32'h0002
+`define bmFR_SAR_MODE_RX 32'h0004
+
+`define FR_SAR_AMPL `FR_USER_5
+`define FR_SAR_FREQ1N `FR_USER_8
Modified:
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar_control.v
===================================================================
---
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar_control.v
2007-07-10 17:09:06 UTC (rev 5929)
+++
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar_control.v
2007-07-10 20:13:40 UTC (rev 5930)
@@ -19,8 +19,7 @@
// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA
//
-`include "../../../../usrp/firmware/include/fpga_regs_common.v"
-`include "../../../../usrp/firmware/include/fpga_regs_standard.v"
+`include "../lib/sar_config.vh"
module sar_control(clk_i,rst_i,ena_i,saddr_i,sdata_i,s_strobe_i,
reset_o,tx_ena_o,rx_ena_o,ampl_o,freq_o);
@@ -48,10 +47,13 @@
wire [1:0] chirps;
// Configuration from host
- setting_reg #(`FR_USER_0)
sr_mode(.clock(clk_i),.reset(rst_i),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i),
-
.out({chirps,md_ena,dr_ena,lp_ena,rx_ena_o,tx_ena_o,reset_o}));
+ setting_reg #(`FR_SAR_MODE)
sr_mode(.clock(clk_i),.reset(rst_i),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i),
+
.out({chirps,md_ena,dr_ena,lp_ena,rx_ena_o,tx_ena_o,reset_o}));
- setting_reg #(`FR_USER_5)
sr_ampl(.clock(clk_i),.reset(rst_i),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i),.out(ampl_o));
- setting_reg #(`FR_USER_8)
sr_freq(.clock(clk_i),.reset(rst_i),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i),.out(freq_o));
+ setting_reg #(`FR_SAR_AMPL)
sr_ampl(.clock(clk_i),.reset(rst_i),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i),
+ .out(ampl_o));
+
+ setting_reg #(`FR_SAR_FREQ1N)
sr_freq(.clock(clk_i),.reset(rst_i),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i),
+ .out(freq_o));
endmodule // sar_control
Modified:
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar_tx.v
===================================================================
--- gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar_tx.v
2007-07-10 17:09:06 UTC (rev 5929)
+++ gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/lib/sar_tx.v
2007-07-10 20:13:40 UTC (rev 5930)
@@ -37,7 +37,7 @@
wire [15:0] cordic_i, cordic_q;
cordic_nco
nco(.clk_i(clk_i),.rst_i(rst_i),.ena_i(ena_i),.strobe_i(strobe_i),
- .ampl_i({2'b00,ampl_i}),.freq_i(freq_i),.phs_i(0),
+ .ampl_i({ampl_i,2'b00}),.freq_i(freq_i),.phs_i(0),
.data_i_o(cordic_i),.data_q_o(cordic_q));
assign tx_i_o = cordic_i[15:2];
Modified:
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/tb/sar_tb.sav
===================================================================
--- gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/tb/sar_tb.sav
2007-07-10 17:09:06 UTC (rev 5929)
+++ gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/tb/sar_tb.sav
2007-07-10 20:13:40 UTC (rev 5930)
@@ -1,4 +1,4 @@
-*-20.426014 4130000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
-1 -1 -1 -1 -1 -1 -1
+*-20.535921 4787000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
-1 -1 -1 -1 -1 -1 -1
@28
sar_tb.clk
sar_tb.ena
@@ -8,10 +8,9 @@
sar_tb.uut.rx_enable
@200
-
address@hidden
-sar_tb.uut.mag[13:0]
address@hidden
sar_tb.uut.freq[31:0]
-sar_tb.uut.phs[31:0]
+sar_tb.uut.controller.ampl_o[13:0]
@200
-
@28
@@ -21,3 +20,5 @@
sar_tb.uut.tx_dac_q_o[13:0]
@200
-
address@hidden
+sar_tb.uut.transmitter.nco.phase[31:0]
Modified:
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/tb/sar_tb.v
===================================================================
--- gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/tb/sar_tb.v
2007-07-10 17:09:06 UTC (rev 5929)
+++ gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/tb/sar_tb.v
2007-07-10 20:13:40 UTC (rev 5930)
@@ -23,15 +23,6 @@
`include "../lib/sar.v"
-`define FR_SAR_MODE 7'd64
-`define bmFR_SAR_MODE_RESET 32'h0001
-`define bmFR_SAR_MODE_TX 32'h0002
-`define bmFR_SAR_MODE_RX 32'h0004
-
-// FIXME - make common include file
-`define FR_SAR_AMPL 7'd69 // FR_USER_5
-`define FR_SAR_FREQ 7'd72 // FR_USER_8
-
module sar_tb;
// System bus
@@ -165,18 +156,16 @@
input [31:0] freq;
begin
- write_cfg_register(`FR_SAR_FREQ, freq);
+ write_cfg_register(`FR_SAR_FREQ1N, freq);
end
endtask // frequency
// Test transmitter functionality
task test_tx;
- input [5:0] degree;
-
begin
#20 set_reset(1);
- #20 set_amplitude(14'h1FFF);
- #20 set_frequency(32'h07FFFFFF);
+ #20 set_amplitude(14'h2000);
+ #20 set_frequency(32'h08000000);
#20 enable_tx(1);
#20 enable_rx(0);
#20 set_reset(0);
@@ -187,7 +176,7 @@
// Execute tests
initial
begin
- #20 test_tx(12);
+ #20 test_tx;
#100 $finish;
end
endmodule
Modified:
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/fpga/top/usrp_sar.rbf
===================================================================
(Binary files differ)
Modified: gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/python/sar.py
===================================================================
--- gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/python/sar.py
2007-07-10 17:09:06 UTC (rev 5929)
+++ gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/python/sar.py
2007-07-10 20:13:40 UTC (rev 5930)
@@ -45,18 +45,19 @@
#FR_SAR_FSTART = usrp.FR_USER_6 # 32-bit FTW for chirp start frequency
#FR_SAR_FINCR = usrp.FR_USER_7 # 32-bit FTW increment per transmit clock
-# This is temporary for debugging transmitter frequency response
-FR_SAR_FREQ = usrp.FR_USER_8
-
# These are for phase II development
-#FR_SAR_FREQ1N = usrp.FR_USER_8 # 24-bit N register for chirp #1
-#FR_SAR_FREQ1K = usrp.FR_USER_9 # 24-bit K register for chirp #1
-#FR_SAR_FREQ2N = usrp.FR_USER_10 # 24-bit N register for chirp #2
-#FR_SAR_FREQ2K = usrp.FR_USER_11 # 24-bit K register for chirp #2
-#FR_SAR_FREQ3N = usrp.FR_USER_12 # 24-bit N register for chirp #3
-#FR_SAR_FREQ3K = usrp.FR_USER_13 # 24-bit K register for chirp #3
-#FR_SAR_FREQ4N = usrp.FR_USER_14 # 24-bit N register for chirp #4
-#FR_SAR_FREQ4K = usrp.FR_USER_15 # 24-bit K register for chirp #4
+FR_SAR_FREQ1N = usrp.FR_USER_8 # 24-bit N register for chirp #1
+FR_SAR_FREQ1R = usrp.FR_USER_9 # 24-bit R register for chirp #1
+FR_SAR_FREQ1C = usrp.FR_USER_10 # 24-bit control register for chirp #1
+FR_SAR_FREQ2N = usrp.FR_USER_11 # 24-bit N register for chirp #2
+FR_SAR_FREQ2R = usrp.FR_USER_12 # 24-bit R register for chirp #2
+FR_SAR_FREQ2C = usrp.FR_USER_13 # 24-bit control register for chirp #2
+FR_SAR_FREQ3N = usrp.FR_USER_14 # 24-bit N register for chirp #3
+FR_SAR_FREQ3R = usrp.FR_USER_15 # 24-bit R register for chirp #3
+FR_SAR_FREQ3C = usrp.FR_USER_16 # 24-bit control register for chirp #3
+FR_SAR_FREQ4N = usrp.FR_USER_17 # 24-bit N register for chirp #4
+FR_SAR_FREQ4R = usrp.FR_USER_18 # 24-bit R register for chirp #4
+FR_SAR_FREQ4C = usrp.FR_USER_19 # 24-bit control register for chirp #4
#-----------------------------------------------------------------------
# Transmitter object. Uses usrp_sink, but only for a handle to the
@@ -83,7 +84,7 @@
result = self._u.tune(0, self._subdev, center_freq)
if result == False:
raise RuntimeError("Failed to set transmitter frequency.")
- self._u._write_fpga_reg(FR_SAR_FREQ, self._ftw)
+ self._u._write_fpga_reg(FR_SAR_FREQ1N, self._ftw)
def set_amplitude(self, ampl):
self._amplitude = ampl
Modified:
gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/python/usrp_sar.py
===================================================================
--- gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/python/usrp_sar.py
2007-07-10 17:09:06 UTC (rev 5929)
+++ gnuradio/branches/developers/jcorgan/sar/gr-sar-fe/src/python/usrp_sar.py
2007-07-10 20:13:40 UTC (rev 5930)
@@ -31,8 +31,6 @@
def main():
parser = OptionParser(option_class=eng_option)
- #parser.add_option("-g", "--gain", type="eng_float", default=None,
- # help="set gain in dB (default is midpoint)")
parser.add_option("-f", "--frequency", type="eng_float", default=0.0,
help="set transmitter center frequency to FREQ in Hz,
default is %default", metavar="FREQ")
# Temporary for debugging transmitter frequency response
@@ -40,14 +38,18 @@
help="set waveform offset frequency to FREQ in Hz,
default is %default", metavar="FREQ")
parser.add_option("-a", "--amplitude", type="int", default=4096,
help="set waveform amplitude, default is %default,")
- #parser.add_option("-l", "--loopback", action="store_true", default=False,
- # help="enable digital loopback, default is disabled")
parser.add_option("-v", "--verbose", action="store_true", default=False,
help="enable verbose output, default is disabled")
parser.add_option("-D", "--debug", action="store_true", default=False,
help="enable debugging output, default is disabled")
+
+ # NOT IMPLEMENTED
+ #parser.add_option("-g", "--gain", type="eng_float", default=None,
+ # help="set gain in dB (default is midpoint)")
+ #parser.add_option("-l", "--loopback", action="store_true", default=False,
+ # help="enable digital loopback, default is disabled")
#parser.add_option("-F", "--filename", default=None,
- # help="log received impulse responses to file")
+ # help="log received echos to file")
(options, args) = parser.parse_args()
@@ -61,7 +63,7 @@
sys.exit(1)
else:
if options.verbose:
- print "Logging impulse records to file: ", options.filename
+ print "Logging echo records to file: ", options.filename
"""
msgq = gr.msg_queue()
Modified:
gnuradio/branches/developers/jcorgan/sar/usrp/firmware/include/fpga_regs_standard.h
===================================================================
---
gnuradio/branches/developers/jcorgan/sar/usrp/firmware/include/fpga_regs_standard.h
2007-07-10 17:09:06 UTC (rev 5929)
+++
gnuradio/branches/developers/jcorgan/sar/usrp/firmware/include/fpga_regs_standard.h
2007-07-10 20:13:40 UTC (rev 5930)
@@ -185,7 +185,7 @@
// FIXME register numbers 50 to 63 are available
// ------------------------------------------------------------------------
-// Registers 64 to 79 are reserved for user custom FPGA builds.
+// Registers 64 to 95 are reserved for user custom FPGA builds.
// The standard USRP software will not touch these.
#define FR_USER_0 64
@@ -204,6 +204,22 @@
#define FR_USER_13 77
#define FR_USER_14 78
#define FR_USER_15 79
+#define FR_USER_16 80
+#define FR_USER_17 81
+#define FR_USER_18 82
+#define FR_USER_19 83
+#define FR_USER_20 84
+#define FR_USER_21 85
+#define FR_USER_22 86
+#define FR_USER_23 87
+#define FR_USER_24 88
+#define FR_USER_25 89
+#define FR_USER_26 90
+#define FR_USER_27 91
+#define FR_USER_28 92
+#define FR_USER_29 93
+#define FR_USER_30 94
+#define FR_USER_31 95
//Registers needed for multi usrp master/slave configuration
//
Modified:
gnuradio/branches/developers/jcorgan/sar/usrp/firmware/include/fpga_regs_standard.v
===================================================================
---
gnuradio/branches/developers/jcorgan/sar/usrp/firmware/include/fpga_regs_standard.v
2007-07-10 17:09:06 UTC (rev 5929)
+++
gnuradio/branches/developers/jcorgan/sar/usrp/firmware/include/fpga_regs_standard.v
2007-07-10 20:13:40 UTC (rev 5930)
@@ -157,7 +157,7 @@
// FIXME register numbers 50 to 63 are available
// ------------------------------------------------------------------------
-// Registers 64 to 79 are reserved for user custom FPGA builds.
+// Registers 64 to 95 are reserved for user custom FPGA builds.
// The standard USRP software will not touch these.
`define FR_USER_0 7'd64
@@ -176,6 +176,22 @@
`define FR_USER_13 7'd77
`define FR_USER_14 7'd78
`define FR_USER_15 7'd79
+`define FR_USER_16 7'd80
+`define FR_USER_17 7'd81
+`define FR_USER_18 7'd82
+`define FR_USER_19 7'd83
+`define FR_USER_20 7'd84
+`define FR_USER_21 7'd85
+`define FR_USER_22 7'd86
+`define FR_USER_23 7'd87
+`define FR_USER_24 7'd88
+`define FR_USER_25 7'd89
+`define FR_USER_26 7'd90
+`define FR_USER_27 7'd91
+`define FR_USER_28 7'd92
+`define FR_USER_29 7'd93
+`define FR_USER_30 7'd94
+`define FR_USER_31 7'd95
//Registers needed for multi usrp master/slave configuration
//
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