[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Commit-gnuradio] r6805 - gnuradio/branches/developers/matt/u2f/top/u2_f
From: |
matt |
Subject: |
[Commit-gnuradio] r6805 - gnuradio/branches/developers/matt/u2f/top/u2_fpga |
Date: |
Fri, 2 Nov 2007 21:29:26 -0600 (MDT) |
Author: matt
Date: 2007-11-02 21:29:25 -0600 (Fri, 02 Nov 2007)
New Revision: 6805
Modified:
gnuradio/branches/developers/matt/u2f/top/u2_fpga/u2_fpga.ucf
Log:
made MDIO into a pullup
Modified: gnuradio/branches/developers/matt/u2f/top/u2_fpga/u2_fpga.ucf
===================================================================
--- gnuradio/branches/developers/matt/u2f/top/u2_fpga/u2_fpga.ucf
2007-11-03 03:28:42 UTC (rev 6804)
+++ gnuradio/branches/developers/matt/u2f/top/u2_fpga/u2_fpga.ucf
2007-11-03 03:29:25 UTC (rev 6805)
@@ -1,5 +1,3 @@
-#PACE: Start of Constraints generated by PACE
-#PACE: Start of PACE I/O Pin Assignments
NET "adc_a[0]" LOC = "A14" ;
NET "adc_a[10]" LOC = "D20" ;
NET "adc_a[11]" LOC = "D19" ;
@@ -28,26 +26,10 @@
NET "adc_b[7]" LOC = "B20" ;
NET "adc_b[8]" LOC = "B19" ;
NET "adc_b[9]" LOC = "C18" ;
-NET "adc_oen_a" LOC = "E19";
-NET "adc_oen_b" LOC = "C17";
-NET "adc_ovf_a" LOC = "F18";
-NET "adc_ovf_b" LOC = "B17";
-NET "adc_pdn_a" LOC = "E20";
-NET "adc_pdn_b" LOC = "D15";
NET "clk_en[0]" LOC = "C4" ;
NET "clk_en[1]" LOC = "D1" ;
-NET "clk_fpga_n" LOC = "B11";
-NET "clk_fpga_p" LOC = "A11";
-NET "clk_func" LOC = "C12";
NET "clk_sel[0]" LOC = "C3" ;
NET "clk_sel[1]" LOC = "C2" ;
-NET "clk_status" LOC = "B12";
-NET "clk_to_mac" LOC = "AB12";
-NET "cpld_clk" LOC = "AB14";
-NET "cpld_din" LOC = "AA14";
-NET "cpld_done" LOC = "V12";
-NET "cpld_mode" LOC = "U12";
-NET "cpld_start" LOC = "AA9";
NET "dac_a[0]" LOC = "A5" ;
NET "dac_a[10]" LOC = "L2" ;
NET "dac_a[11]" LOC = "L4" ;
@@ -114,16 +96,6 @@
NET "debug[9]" LOC = "R5" ;
NET "debug_clk[0]" LOC = "N4" ;
NET "debug_clk[1]" LOC = "M1" ;
-NET "exp_pps_in_n" LOC = "V4";
-NET "exp_pps_in_p" LOC = "V3";
-NET "exp_pps_out_n" LOC = "V2";
-NET "exp_pps_out_p" LOC = "V1";
-NET "GMII_COL" LOC = "U16";
-NET "GMII_CRS" LOC = "U17";
-NET "GMII_GTX_CLK" LOC = "AA17";
-NET "GMII_RX_CLK" LOC = "W16";
-NET "GMII_RX_DV" LOC = "AB16";
-NET "GMII_RX_ER" LOC = "AA16";
NET "GMII_RXD[0]" LOC = "AA15" ;
NET "GMII_RXD[1]" LOC = "AB15" ;
NET "GMII_RXD[2]" LOC = "U14" ;
@@ -132,9 +104,6 @@
NET "GMII_RXD[5]" LOC = "V13" ;
NET "GMII_RXD[6]" LOC = "Y13" ;
NET "GMII_RXD[7]" LOC = "AA13" ;
-NET "GMII_TX_CLK" LOC = "W13";
-NET "GMII_TX_EN" LOC = "Y17";
-NET "GMII_TX_ER" LOC = "V16";
NET "GMII_TXD[0]" LOC = "W14" ;
NET "GMII_TXD[1]" LOC = "AA20" ;
NET "GMII_TXD[2]" LOC = "AB20" ;
@@ -175,14 +144,6 @@
NET "io_tx[7]" LOC = "F5" ;
NET "io_tx[8]" LOC = "G6" ;
NET "io_tx[9]" LOC = "E2" ;
-NET "led1" LOC = "V11";
-NET "led2" LOC = "Y12";
-NET "MDC" LOC = "V18";
-NET "MDIO" LOC = "Y16";
-NET "PHY_CLK" LOC = "V15";
-NET "PHY_INTn" LOC = "AB13";
-NET "PHY_RESETn" LOC = "AA19";
-NET "pps_in" LOC = "Y11";
NET "RAM_A[0]" LOC = "N22" ;
NET "RAM_A[10]" LOC = "P18" ;
NET "RAM_A[11]" LOC = "R19" ;
@@ -202,9 +163,6 @@
NET "RAM_A[7]" LOC = "P21" ;
NET "RAM_A[8]" LOC = "P22" ;
NET "RAM_A[9]" LOC = "P17" ;
-NET "RAM_CE1n" LOC = "N21";
-NET "RAM_CENn" LOC = "M18";
-NET "RAM_CLK" LOC = "M17";
NET "RAM_D[0]" LOC = "Y21" ;
NET "RAM_D[10]" LOC = "V22" ;
NET "RAM_D[11]" LOC = "V21" ;
@@ -223,43 +181,6 @@
NET "RAM_D[7]" LOC = "W20" ;
NET "RAM_D[8]" LOC = "U19" ;
NET "RAM_D[9]" LOC = "V20" ;
-NET "RAM_LDn" LOC = "M21";
-NET "RAM_OEn" LOC = "M19";
-NET "RAM_WEn" LOC = "M20";
-NET "SCL" LOC = "A7";
-NET "SCL_force" LOC = "E8";
-NET "sclk" LOC = "K5";
-NET "sclk_rx_adc" LOC = "J17";
-NET "sclk_rx_dac" LOC = "J19";
-NET "sclk_rx_db" LOC = "F19";
-NET "sclk_tx_adc" LOC = "H1";
-NET "sclk_tx_dac" LOC = "J5";
-NET "sclk_tx_db" LOC = "D3";
-NET "SDA" LOC = "D8";
-NET "SDA_force" LOC = "C11";
-NET "sdi" LOC = "J1";
-NET "sdi_rx_adc" LOC = "H22";
-NET "sdi_rx_dac" LOC = "J21";
-NET "sdi_rx_db" LOC = "H19";
-NET "sdi_tx_adc" LOC = "J4";
-NET "sdi_tx_dac" LOC = "J6";
-NET "sdi_tx_db" LOC = "G4";
-NET "sdo" LOC = "J2";
-NET "sdo_rx_adc" LOC = "H21";
-NET "sdo_rx_db" LOC = "G20";
-NET "sdo_tx_adc" LOC = "H2";
-NET "sdo_tx_db" LOC = "G3";
-NET "sen_clk" LOC = "K6";
-NET "sen_dac" LOC = "L1";
-NET "sen_rx_adc" LOC = "H18";
-NET "sen_rx_dac" LOC = "J18";
-NET "sen_rx_db" LOC = "D22";
-NET "sen_tx_adc" LOC = "G2";
-NET "sen_tx_dac" LOC = "H4";
-NET "sen_tx_db" LOC = "C1";
-NET "ser_enable" LOC = "W11";
-NET "ser_loopen" LOC = "Y4";
-NET "ser_prbsen" LOC = "AA3";
NET "ser_r[0]" LOC = "AB10" ;
NET "ser_r[10]" LOC = "W10" ;
NET "ser_r[11]" LOC = "Y1" ;
@@ -276,10 +197,6 @@
NET "ser_r[7]" LOC = "AB7" ;
NET "ser_r[8]" LOC = "AA7" ;
NET "ser_r[9]" LOC = "W9" ;
-NET "ser_rklsb" LOC = "V9";
-NET "ser_rkmsb" LOC = "Y10";
-NET "ser_rx_clk" LOC = "AA11";
-NET "ser_rx_en" LOC = "AB9";
NET "ser_t[0]" LOC = "V7" ;
NET "ser_t[10]" LOC = "AA6" ;
NET "ser_t[11]" LOC = "Y6" ;
@@ -296,12 +213,6 @@
NET "ser_t[7]" LOC = "AA5" ;
NET "ser_t[8]" LOC = "W6" ;
NET "ser_t[9]" LOC = "V6" ;
-NET "ser_tklsb" LOC = "U10";
-NET "ser_tkmsb" LOC = "U11";
-NET "ser_tx_clk" LOC = "U7";
-#PACE: Start of PACE Area Constraints
-#PACE: Start of PACE Prohibit Constraints
-#PACE: End of Constraints generated by PACE
NET "clk_muxed" TNM_NET = "clk_muxed";
TIMESPEC "TS_clk_muxed" = PERIOD "clk_muxed" 10 ns HIGH 50 %;
NET "clk_to_mac" TNM_NET = "clk_to_mac";
@@ -316,3 +227,96 @@
TIMESPEC "TS_GMII_TX_CLK" = PERIOD "GMII_TX_CLK" 8 ns HIGH 50 %;
NET "ser_rx_clk" TNM_NET = "ser_rx_clk";
TIMESPEC "TS_ser_rx_clk" = PERIOD "ser_rx_clk" 10 ns HIGH 50 %;
+#PACE: Start of Constraints generated by PACE
+
+#PACE: Start of PACE I/O Pin Assignments
+NET "adc_oen_a" LOC = "E19" ;
+NET "adc_oen_b" LOC = "C17" ;
+NET "adc_ovf_a" LOC = "F18" ;
+NET "adc_ovf_b" LOC = "B17" ;
+NET "adc_pdn_a" LOC = "E20" ;
+NET "adc_pdn_b" LOC = "D15" ;
+NET "clk_fpga_n" LOC = "B11" ;
+NET "clk_fpga_p" LOC = "A11" ;
+NET "clk_func" LOC = "C12" ;
+NET "clk_status" LOC = "B12" ;
+NET "clk_to_mac" LOC = "AB12" ;
+NET "cpld_clk" LOC = "AB14" ;
+NET "cpld_din" LOC = "AA14" ;
+NET "cpld_done" LOC = "V12" ;
+NET "cpld_mode" LOC = "U12" ;
+NET "cpld_start" LOC = "AA9" ;
+NET "exp_pps_in_n" LOC = "V4" ;
+NET "exp_pps_in_p" LOC = "V3" ;
+NET "exp_pps_out_n" LOC = "V2" ;
+NET "exp_pps_out_p" LOC = "V1" ;
+NET "GMII_COL" LOC = "U16" ;
+NET "GMII_CRS" LOC = "U17" ;
+NET "GMII_GTX_CLK" LOC = "AA17" ;
+NET "GMII_RX_CLK" LOC = "W16" ;
+NET "GMII_RX_DV" LOC = "AB16" ;
+NET "GMII_RX_ER" LOC = "AA16" ;
+NET "GMII_TX_CLK" LOC = "W13" ;
+NET "GMII_TX_EN" LOC = "Y17" ;
+NET "GMII_TX_ER" LOC = "V16" ;
+NET "led1" LOC = "V11" ;
+NET "led2" LOC = "Y12" ;
+NET "MDC" LOC = "V18" ;
+NET "MDIO" LOC = "Y16" | PULLUP ;
+NET "PHY_CLK" LOC = "V15" ;
+NET "PHY_INTn" LOC = "AB13" ;
+NET "PHY_RESETn" LOC = "AA19" ;
+NET "pps_in" LOC = "Y11" ;
+NET "RAM_CE1n" LOC = "N21" ;
+NET "RAM_CENn" LOC = "M18" ;
+NET "RAM_CLK" LOC = "M17" ;
+NET "RAM_LDn" LOC = "M21" ;
+NET "RAM_OEn" LOC = "M19" ;
+NET "RAM_WEn" LOC = "M20" ;
+NET "SCL" LOC = "A7" ;
+NET "SCL_force" LOC = "E8" ;
+NET "sclk" LOC = "K5" ;
+NET "sclk_rx_adc" LOC = "J17" ;
+NET "sclk_rx_dac" LOC = "J19" ;
+NET "sclk_rx_db" LOC = "F19" ;
+NET "sclk_tx_adc" LOC = "H1" ;
+NET "sclk_tx_dac" LOC = "J5" ;
+NET "sclk_tx_db" LOC = "D3" ;
+NET "SDA" LOC = "D8" ;
+NET "SDA_force" LOC = "C11" ;
+NET "sdi" LOC = "J1" ;
+NET "sdi_rx_adc" LOC = "H22" ;
+NET "sdi_rx_dac" LOC = "J21" ;
+NET "sdi_rx_db" LOC = "H19" ;
+NET "sdi_tx_adc" LOC = "J4" ;
+NET "sdi_tx_dac" LOC = "J6" ;
+NET "sdi_tx_db" LOC = "G4" ;
+NET "sdo" LOC = "J2" ;
+NET "sdo_rx_adc" LOC = "H21" ;
+NET "sdo_rx_db" LOC = "G20" ;
+NET "sdo_tx_adc" LOC = "H2" ;
+NET "sdo_tx_db" LOC = "G3" ;
+NET "sen_clk" LOC = "K6" ;
+NET "sen_dac" LOC = "L1" ;
+NET "sen_rx_adc" LOC = "H18" ;
+NET "sen_rx_dac" LOC = "J18" ;
+NET "sen_rx_db" LOC = "D22" ;
+NET "sen_tx_adc" LOC = "G2" ;
+NET "sen_tx_dac" LOC = "H4" ;
+NET "sen_tx_db" LOC = "C1" ;
+NET "ser_enable" LOC = "W11" ;
+NET "ser_loopen" LOC = "Y4" ;
+NET "ser_prbsen" LOC = "AA3" ;
+NET "ser_rklsb" LOC = "V9" ;
+NET "ser_rkmsb" LOC = "Y10" ;
+NET "ser_rx_clk" LOC = "AA11" ;
+NET "ser_rx_en" LOC = "AB9" ;
+NET "ser_tklsb" LOC = "U10" ;
+NET "ser_tkmsb" LOC = "U11" ;
+NET "ser_tx_clk" LOC = "U7" ;
+
+#PACE: Start of PACE Area Constraints
+
+#PACE: Start of PACE Prohibit Constraints
+
+#PACE: End of Constraints generated by PACE
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- [Commit-gnuradio] r6805 - gnuradio/branches/developers/matt/u2f/top/u2_fpga,
matt <=