[Commit-gnuradio] r8829 - usrp2/trunk/fpga/sdr_lib

[matt]

Author: matt
Date: 2008-07-08 16:54:28 -0600 (Tue, 08 Jul 2008)
New Revision: 8829

Modified:
   usrp2/trunk/fpga/sdr_lib/dsp_core_tx.v
Log:
registered the strobes for timing reasons


Modified: usrp2/trunk/fpga/sdr_lib/dsp_core_tx.v
===================================================================
--- usrp2/trunk/fpga/sdr_lib/dsp_core_tx.v      2008-07-08 22:53:12 UTC (rev 
8828)
+++ usrp2/trunk/fpga/sdr_lib/dsp_core_tx.v      2008-07-08 22:54:28 UTC (rev 
8829)
@@ -20,10 +20,8 @@
    reg [31:0]  phase;
    wire [7:0]  interp_rate;
 
-   wire        strobe_cic, strobe_hb1, strobe_hb2;
    wire        enable_hb1, enable_hb2;
-   assign       debug = {strobe_cic, strobe_hb1, strobe_hb2,run};
-   
+
    setting_reg #(.my_addr(`DSP_CORE_TX_BASE+0)) sr_0
      (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
       .in(set_data),.out(phase_inc),.changed());
@@ -36,20 +34,27 @@
      (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
       .in(set_data),.out({enable_hb1, enable_hb2, interp_rate}),.changed());
 
-   wire [8:0] total_interp_rate = (enable_hb1 & enable_hb2) ? 
{interp_rate,2'b0} :
-             (enable_hb1 | enable_hb2) ? {interp_rate,1'b0} :
-             {1'b0,interp_rate};
+   // Strobes are all now delayed by 1 cycle for timing reasons
+   wire        strobe_cic_pre, strobe_hb1_pre, strobe_hb2_pre;
+   reg                strobe_cic = 1;
+   reg                strobe_hb1 = 1;
+   reg                strobe_hb2 = 1;
    
    cic_strober #(.WIDTH(8))
      cic_strober(.clock(clk),.reset(rst),.enable(run),.rate(interp_rate),
-            .strobe_fast(1),.strobe_slow(strobe_cic) );
+                .strobe_fast(1),.strobe_slow(strobe_cic_pre) );
    cic_strober #(.WIDTH(2))
      hb2_strober(.clock(clk),.reset(rst),.enable(run),.rate(enable_hb2 ? 2 : 
1),
-            .strobe_fast(strobe_cic),.strobe_slow(strobe_hb2) );
+                .strobe_fast(strobe_cic_pre),.strobe_slow(strobe_hb2_pre) );
    cic_strober #(.WIDTH(2))
      hb1_strober(.clock(clk),.reset(rst),.enable(run),.rate(enable_hb1 ? 2 : 
1),
-            .strobe_fast(strobe_hb2),.strobe_slow(strobe_hb1) );
+                .strobe_fast(strobe_hb2_pre),.strobe_slow(strobe_hb1_pre) );
    
+   always @(posedge clk) strobe_hb1 <= strobe_hb1_pre;
+   always @(posedge clk) strobe_hb2 <= strobe_hb2_pre;
+   always @(posedge clk) strobe_cic <= strobe_cic_pre;
+
+   // DDC
    always @(posedge clk)
      if(rst)
        phase <= 0;
@@ -118,4 +123,6 @@
    always @(posedge clk)
      dac_b <= prod_q[28:13];
 
+   assign      debug = {strobe_cic, strobe_hb1, strobe_hb2,run};
+
 endmodule // dsp_core