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[Commit-gnuradio] r8872 - gnuradio/branches/developers/trondeau/dbs/gr-u
|
From: |
trondeau |
|
Subject: |
[Commit-gnuradio] r8872 - gnuradio/branches/developers/trondeau/dbs/gr-usrp/src |
|
Date: |
Sun, 13 Jul 2008 11:15:29 -0600 (MDT) |
Author: trondeau
Date: 2008-07-13 11:15:29 -0600 (Sun, 13 Jul 2008)
New Revision: 8872
Added:
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_base.cc
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_base.h
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_base.i
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink.i
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source.i
Removed:
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp.py
Modified:
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1.i
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_base.cc
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_base.h
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_c.cc
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_c.h
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_base.cc
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_base.h
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_c.cc
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_c.h
Log:
wip: making usrp c++ base class and restructuring a bit
Deleted: gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp.py
Modified: gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1.i
===================================================================
--- gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1.i
2008-07-13 16:40:06 UTC (rev 8871)
+++ gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1.i
2008-07-13 17:15:29 UTC (rev 8872)
@@ -1,6 +1,6 @@
/* -*- c++ -*- */
/*
- * Copyright 2004 Free Software Foundation, Inc.
+ * Copyright 2004,2008 Free Software Foundation, Inc.
*
* This file is part of GNU Radio
*
@@ -26,632 +26,27 @@
%import "gnuradio.i" // the common stuff
%{
-
#include "gnuradio_swig_bug_workaround.h" // mandatory bug fix
-#include "usrp1_sink_c.h"
-#include "usrp1_sink_s.h"
+#include "usrp1_base.h"
+#include "usrp1_source_base.h"
#include "usrp1_source_c.h"
-#include "usrp1_source_s.h"
+#include "usrp1_sink_base.h"
+#include "usrp1_sink_c.h"
+#include "usrp_standard.h"
+#include "usrp_spi_defs.h"
#include <stdexcept>
-#include <usrp_standard.h>
-#include <usrp_spi_defs.h>
%}
%include <usrp_spi_defs.h>
+%include <usrp1_base.i>
+%include <usrp1_source.i>
+%include <usrp1_sink.i>
+%include <db_base.i>
+%include <db_basic.i>
+%include <db_tv_rx.i>
%constant int FPGA_MODE_NORMAL = usrp_standard_rx::FPGA_MODE_NORMAL;
%constant int FPGA_MODE_LOOPBACK = usrp_standard_rx::FPGA_MODE_LOOPBACK;
%constant int FPGA_MODE_COUNTING = usrp_standard_rx::FPGA_MODE_COUNTING;
-// ================================================================
-// abstract classes
-// ================================================================
-class usrp1_sink_base : public gr_sync_block {
-protected:
- usrp1_sink_base (const std::string &name,
- gr_io_signature_sptr input_signature,
- int which_board,
- unsigned int interp_rate,
- int nchan,
- int mux,
- int fusb_block_size,
- int fusb_nblocks,
- const std::string fpga_filename,
- const std::string firmware_filename
- ) throw (std::runtime_error);
-
- virtual void copy_to_usrp_buffer (gr_vector_const_void_star &input_items,
- int input_index,
- int input_items_available,
- int &input_items_consumed,
- void *usrp_buffer,
- int usrp_buffer_length,
- int &bytes_written) = 0;
- public:
- ~usrp1_sink_base ();
-
- /*!
- * \brief Set interpolator rate. \p rate must be in [4, 1024] and a
multiple of 4.
- *
- * The final complex sample rate across the USB is
- * dac_freq () * nchannels () / interp_rate ()
- */
- bool set_interp_rate (unsigned int rate);
- bool set_nchannels (int nchan);
- bool set_mux (int mux);
-
- /*!
- * \brief set the frequency of the digital up converter.
- *
- * \p channel must be 0 or 1. \p freq is the center frequency in Hz.
- * It must be in the range [-44M, 44M]. The frequency specified is
- * quantized. Use tx_freq to retrieve the actual value used.
- */
- bool set_tx_freq (int channel, double freq);
-
- void set_verbose (bool verbose);
-
- // ACCESSORS
-
- long fpga_master_clock_freq() const;
- long converter_rate() const; // D/A sample rate
- long dac_rate() const; // alias
- long dac_freq () const; // deprecated name. Use converter_rate()
or dac_rate().
-
- unsigned int interp_rate () const;
- double tx_freq (int channel) const;
- int nunderruns () const { return d_nunderruns; }
-
- /*!
- * \brief Set Programmable Gain Amplifier (PGA)
- *
- * \param which which D/A [0,3]
- * \param gain_in_db gain value (linear in dB)
- *
- * gain is rounded to closest setting supported by hardware.
- * Note that DAC 0 and DAC 1 share a gain setting as do DAC 2 and DAC 3.
- * Setting DAC 0 affects DAC 1 and vice versa. Same with DAC 2 and DAC 3.
- *
- * \returns true iff sucessful.
- *
- * \sa pga_min(), pga_max(), pga_db_per_step()
- */
- bool set_pga (int which, double gain_in_db);
-
- /*!
- * \brief Return programmable gain amplifier gain in dB.
- *
- * \param which which D/A [0,3]
- */
- double pga (int which) const;
-
- /*!
- * \brief Return minimum legal PGA gain in dB.
- */
- double pga_min () const;
-
- /*!
- * \brief Return maximum legal PGA gain in dB.
- */
- double pga_max () const;
-
- /*!
- * \brief Return hardware step size of PGA (linear in dB).
- */
- double pga_db_per_step () const;
-
- /*!
- * \brief Return daughterboard ID for given Tx daughterboard slot [0,1].
- *
- * \return daughterboard id >= 0 if successful
- * \return -1 if no daugherboard
- * \return -2 if invalid EEPROM on daughterboard
- */
- int daughterboard_id (int which_dboard) const;
-
- /*!
- * \brief Set ADC offset correction
- * \param which which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q...
- * \param offset 16-bit value to subtract from raw ADC input.
- */
- bool set_adc_offset (int which, int offset);
-
- /*!
- * \brief Set DAC offset correction
- * \param which which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q...
- * \param offset 10-bit offset value (ambiguous format: See AD9862
datasheet).
- * \param offset_pin 1-bit value. If 0 offset applied to -ve differential
pin;
- * If 1 offset applied to +ve differential
pin.
- */
- bool set_dac_offset (int which, int offset, int offset_pin);
-
- /*!
- * \brief Control ADC input buffer
- * \param which which ADC[0,3]
- * \param bypass if non-zero, bypass input buffer and connect input
- * directly to switched cap SHA input of RxPGA.
- */
- bool set_adc_buffer_bypass (int which, bool bypass);
-
- /*!
- * \brief return the usrp's serial number.
- *
- * \returns non-zero length string iff successful.
- */
- std::string serial_number();
-
- /*!
- * \brief Write direction register (output enables) for pins that go to
daughterboard.
- *
- * \param which_dboard [0,1] which d'board
- * \param value value to write into register
- * \param mask which bits of value to write into reg
- *
- * Each d'board has 16-bits of general purpose i/o.
- * Setting the bit makes it an output from the FPGA to the d'board.
- *
- * This register is initialized based on a value stored in the
- * d'board EEPROM. In general, you shouldn't be using this routine
- * without a very good reason. Using this method incorrectly will
- * kill your USRP motherboard and/or daughterboard.
- */
- bool _write_oe (int which_dboard, int value, int mask);
-
- /*!
- * \brief Write daughterboard i/o pin value
- *
- * \param which_dboard [0,1] which d'board
- * \param value value to write into register
- * \param mask which bits of value to write into reg
- */
- bool write_io (int which_dboard, int value, int mask);
-
- /*!
- * \brief Read daughterboard i/o pin value
- *
- * \param which_dboard [0,1] which d'board
- * \returns register value if successful, else READ_FAILED
- */
- int read_io (int which_dboard);
-
- bool write_aux_dac (int which_dboard, int which_dac, int value);
- int read_aux_adc (int which_dboard, int which_adc);
- bool write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf);
- std::string read_eeprom (int i2c_addr, int eeprom_offset, int len);
- bool write_i2c (int i2c_addr, const std::string buf);
- std::string read_i2c (int i2c_addr, int len);
-
- bool _write_fpga_reg (int regno, int value); //< 7-bit regno, 32-bit value
- int _read_fpga_reg (int regno);
- bool _write_9862 (int which_codec, int regno, unsigned char value);
- int _read_9862 (int which_codec, int regno) const;
-
- /*!
- * \brief Write data to SPI bus peripheral.
- *
- * \param optional_header 0,1 or 2 bytes to write before buf.
- * \param enables bitmask of peripherals to write. See
usrp_spi_defs.h
- * \param format transaction format. See usrp_spi_defs.h
SPI_FMT_*
- * \param buf the data to write
- * \returns true iff successful
- * Writes are limited to a maximum of 64 bytes.
- *
- * If \p format specifies that optional_header bytes are present, they are
- * written to the peripheral immediately prior to writing \p buf.
- */
- bool _write_spi (int optional_header, int enables, int format, std::string
buf);
-
- /*
- * \brief Read data from SPI bus peripheral.
- *
- * \param optional_header 0,1 or 2 bytes to write before buf.
- * \param enables bitmask of peripheral to read. See
usrp_spi_defs.h
- * \param format transaction format. See usrp_spi_defs.h
SPI_FMT_*
- * \param len number of bytes to read. Must be in
[0,64].
- * \returns the data read if sucessful, else a zero length string.
- *
- * Reads are limited to a maximum of 64 bytes.
- *
- * If \p format specifies that optional_header bytes are present, they
- * are written to the peripheral first. Then \p len bytes are read from
- * the peripheral and returned.
- */
- std::string _read_spi (int optional_header, int enables, int format, int
len);
-};
-
-// ----------------------------------------------------------------
-
-class usrp1_source_base : public gr_sync_block {
- protected:
-
- usrp1_source_base (const std::string &name,
- gr_io_signature_sptr input_signature,
- int which_board,
- unsigned int interp_rate,
- int nchan,
- int mux,
- int fusb_block_size,
- int fusb_nblocks,
- const std::string fpga_filename,
- const std::string firmware_filename
- ) throw (std::runtime_error);
-
- virtual int ninput_bytes_reqd_for_noutput_items (int noutput_items) = 0;
-
- virtual void copy_from_usrp_buffer (gr_vector_void_star &output_items,
- int output_index,
- int output_items_available,
- int &output_items_produced,
- const void *usrp_buffer,
- int usrp_buffer_length,
- int &bytes_read) = 0;
- public:
- ~usrp1_source_base ();
-
-
- /*!
- * \brief Set decimator rate. \p rate must be EVEN and in [8, 256].
- *
- * The final complex sample rate across the USB is
- * adc_freq () / decim_rate ()
- */
- bool set_decim_rate (unsigned int rate);
- bool set_nchannels (int nchan);
- bool set_mux (int mux);
-
- /*!
- * \brief set the center frequency of the digital down converter.
- *
- * \p channel must be 0. \p freq is the center frequency in Hz.
- * It must be in the range [-FIXME, FIXME]. The frequency specified is
- * quantized. Use rx_freq to retrieve the actual value used.
- */
- bool set_rx_freq (int channel, double freq);
-
- /*!
- * \brief set fpga special modes
- */
- bool set_fpga_mode (int mode);
-
- /*!
- * \brief Set the digital down converter phase register.
- *
- * \param channel which ddc channel [0, 3]
- * \param phase 32-bit integer phase value.
- */
- bool set_ddc_phase(int channel, int phase);
-
-
- void set_verbose (bool verbose);
-
- // ACCESSORS
-
- long fpga_master_clock_freq() const;
- long converter_rate() const; // A/D sample rate
- long adc_rate() const; // alias
- long adc_freq() const; // Deprecated name. Use converter_rate() or
adc_rate().
-
- unsigned int decim_rate () const;
- double rx_freq (int channel) const;
- int noverruns () const { return d_noverruns; }
-
-
- // PGA stuff
- /*!
- * \brief Set Programmable Gain Amplifier (PGA)
- *
- * \param which which A/D [0,3]
- * \param gain_in_db gain value (linear in dB)
- *
- * gain is rounded to closest setting supported by hardware.
- *
- * \returns true iff sucessful.
- *
- * \sa pga_min(), pga_max(), pga_db_per_step()
- */
- bool set_pga (int which, double gain_in_db);
-
- /*!
- * \brief Return programmable gain amplifier gain setting in dB.
- *
- * \param which which A/D [0,3]
- */
- double pga (int which) const;
-
- /*!
- * \brief Return minimum legal PGA setting in dB.
- */
- double pga_min () const;
-
- /*!
- * \brief Return maximum legal PGA setting in dB.
- */
- double pga_max () const;
-
- /*!
- * \brief Return hardware step size of PGA (linear in dB).
- */
- double pga_db_per_step () const;
-
- /*!
- * \brief Return daughterboard ID for given Rx daughterboard slot [0,1].
- *
- * \return daughterboard id >= 0 if successful
- * \return -1 if no daugherboard
- * \return -2 if invalid EEPROM on daughterboard
- */
- int daughterboard_id (int which_dboard) const;
-
- /*!
- * \brief Set ADC offset correction
- * \param which which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q...
- * \param offset 16-bit value to subtract from raw ADC input.
- */
- bool set_adc_offset (int which, int offset);
-
- /*!
- * \brief Set DAC offset correction
- * \param which which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q...
- * \param offset 10-bit offset value (ambiguous format: See AD9862
datasheet).
- * \param offset_pin 1-bit value. If 0 offset applied to -ve differential
pin;
- * If 1 offset applied to +ve differential
pin.
- */
- bool set_dac_offset (int which, int offset, int offset_pin);
-
- /*!
- * \brief Control ADC input buffer
- * \param which which ADC[0,3]
- * \param bypass if non-zero, bypass input buffer and connect input
- * directly to switched cap SHA input of RxPGA.
- */
- bool set_adc_buffer_bypass (int which, bool bypass);
-
- /*!
- * \brief return the usrp's serial number.
- *
- * \returns non-zero length string iff successful.
- */
- std::string serial_number();
-
- /*!
- * \brief Write direction register (output enables) for pins that go to
daughterboard.
- *
- * \param which_dboard [0,1] which d'board
- * \param value value to write into register
- * \param mask which bits of value to write into reg
- *
- * Each d'board has 16-bits of general purpose i/o.
- * Setting the bit makes it an output from the FPGA to the d'board.
- *
- * This register is initialized based on a value stored in the
- * d'board EEPROM. In general, you shouldn't be using this routine
- * without a very good reason. Using this method incorrectly will
- * kill your USRP motherboard and/or daughterboard.
- */
- bool _write_oe (int which_dboard, int value, int mask);
-
- /*!
- * \brief Write daughterboard i/o pin value
- *
- * \param which_dboard [0,1] which d'board
- * \param value value to write into register
- * \param mask which bits of value to write into reg
- */
- bool write_io (int which_dboard, int value, int mask);
-
- /*!
- * \brief Read daughterboard i/o pin value
- *
- * \param which_dboard [0,1] which d'board
- * \returns register value if successful, else READ_FAILED
- */
- int read_io (int which_dboard);
-
- /*!
- * \brief Enable/disable automatic DC offset removal control loop in FPGA
- *
- * \param bits which control loops to enable
- * \param mask which \p bits to pay attention to
- *
- * If the corresponding bit is set, enable the automatic DC
- * offset correction control loop.
- *
- * <pre>
- * The 4 low bits are significant:
- *
- * ADC0 = (1 << 0)
- * ADC1 = (1 << 1)
- * ADC2 = (1 << 2)
- * ADC3 = (1 << 3)
- * </pre>
- *
- * By default the control loop is enabled on all ADC's.
- */
- bool set_dc_offset_cl_enable(int bits, int mask);
-
- /*!
- * \brief Specify Rx data format.
- *
- * \param format format specifier
- *
- * Rx data format control register
- *
- * 3 2 1
- * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
- * +-----------------------------------------+-+-+---------+-------+
- * | Reserved (Must be zero) |B|Q| WIDTH | SHIFT |
- * +-----------------------------------------+-+-+---------+-------+
- *
- * SHIFT specifies arithmetic right shift [0, 15]
- * WIDTH specifies bit-width of I & Q samples across the USB [1, 16] (not
all valid)
- * Q if set deliver both I & Q, else just I
- * B if set bypass half-band filter.
- *
- * Right now the acceptable values are:
- *
- * B Q WIDTH SHIFT
- * 0 1 16 0
- * 0 1 8 8
- *
- * More valid combos to come.
- *
- * Default value is 0x00000300 16-bits, 0 shift, deliver both I & Q.
- */
- bool set_format(unsigned int format);
-
- /*!
- * \brief return current format
- */
- unsigned int format () const;
-
- static unsigned int make_format(int width=16, int shift=0,
- bool want_q=true, bool bypass_halfband=false);
- static int format_width(unsigned int format);
- static int format_shift(unsigned int format);
- static bool format_want_q(unsigned int format);
- static bool format_bypass_halfband(unsigned int format);
-
-
-
-
- bool write_aux_dac (int which_dboard, int which_dac, int value);
- int read_aux_adc (int which_dboard, int which_adc);
- bool write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf);
- std::string read_eeprom (int i2c_addr, int eeprom_offset, int len);
- bool write_i2c (int i2c_addr, const std::string buf);
- std::string read_i2c (int i2c_addr, int len);
- bool _write_fpga_reg (int regno, int value); //< 7-bit regno, 32-bit value
- bool _write_fpga_reg_masked (int regno, int value, int mask); //< 7-bit
regno, 16-bit value, 16-bit mask
- int _read_fpga_reg (int regno);
- bool _write_9862 (int which_codec, int regno, unsigned char value);
- int _read_9862 (int which_codec, int regno) const;
-
- bool _write_spi (int optional_header, int enables, int format, std::string
buf);
-
- /*
- * \brief Read data from SPI bus peripheral.
- *
- * \param optional_header 0,1 or 2 bytes to write before buf.
- * \param enables bitmask of peripheral to read. See
usrp_spi_defs.h
- * \param format transaction format. See usrp_spi_defs.h
SPI_FMT_*
- * \param len number of bytes to read. Must be in
[0,64].
- * \returns the data read if sucessful, else a zero length string.
- *
- * Reads are limited to a maximum of 64 bytes.
- *
- * If \p format specifies that optional_header bytes are present, they
- * are written to the peripheral first. Then \p len bytes are read from
- * the peripheral and returned.
- */
- std::string _read_spi (int optional_header, int enables, int format, int
len);
-};
-
-
-// ================================================================
-// concrete sinks
-// ================================================================
-
-
-GR_SWIG_BLOCK_MAGIC(usrp1,sink_c)
-
-usrp1_sink_c_sptr
-usrp1_make_sink_c (int which_board,
- unsigned int interp_rate,
- int nchan,
- int mux,
- int fusb_block_size,
- int fusb_nblocks,
- const std::string fpga_filename,
- const std::string firmware_filename
- ) throw (std::runtime_error);
-
-
-class usrp1_sink_c : public usrp1_sink_base {
- protected:
- usrp1_sink_c (int which_board, unsigned int interp_rate,
- int nchan, int mux);
-
- public:
- ~usrp1_sink_c ();
-};
-
-// ----------------------------------------------------------------
-
-GR_SWIG_BLOCK_MAGIC(usrp1,sink_s)
-
-usrp1_sink_s_sptr
-usrp1_make_sink_s (int which_board,
- unsigned int interp_rate,
- int nchan,
- int mux,
- int fusb_block_size,
- int fusb_nblocks,
- const std::string fpga_filename,
- const std::string firmware_filename
- ) throw (std::runtime_error);
-
-
-class usrp1_sink_s : public usrp1_sink_base {
- protected:
- usrp1_sink_s (int which_board, unsigned int interp_rate,
- int nchan, int mux);
-
- public:
- ~usrp1_sink_s ();
-};
-
-// ================================================================
-// concrete sources
-// ================================================================
-
-GR_SWIG_BLOCK_MAGIC(usrp1,source_c)
-
-
-usrp1_source_c_sptr
-usrp1_make_source_c (int which_board,
- unsigned int decim_rate,
- int nchan,
- int mux,
- int mode,
- int fusb_block_size,
- int fusb_nblocks,
- const std::string fpga_filename,
- const std::string firmware_filename
- ) throw (std::runtime_error);
-
-class usrp1_source_c : public usrp1_source_base {
- protected:
- usrp1_source_c (int which_board, unsigned int decim_rate,
- int nchan, int mux, int mode);
-
- public:
- ~usrp1_source_c ();
-};
-
-// ----------------------------------------------------------------
-
-GR_SWIG_BLOCK_MAGIC(usrp1,source_s)
-
-usrp1_source_s_sptr
-usrp1_make_source_s (int which_board,
- unsigned int decim_rate,
- int nchan,
- int mux,
- int mode,
- int fusb_block_size,
- int fusb_nblocks,
- const std::string fpga_filename,
- const std::string firmware_filename
- ) throw (std::runtime_error);
-
-
-class usrp1_source_s : public usrp1_source_base {
- protected:
- usrp1_source_s (int which_board, unsigned int decim_rate,
- int nchan, int mux, int mode);
-
- public:
- ~usrp1_source_s ();
-};
-
Added: gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_base.cc
===================================================================
--- gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_base.cc
(rev 0)
+++ gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_base.cc
2008-07-13 17:15:29 UTC (rev 8872)
@@ -0,0 +1,373 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2008 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <usrp_standard.h>
+#include <usrp1_base.h>
+#include <db_base.h>
+#include <assert.h>
+
+
+usrp1_base::usrp1_base(const std::string &name, gr_io_signature_sptr insig,
gr_io_signature_sptr outsig)
+ : gr_sync_block (name, insig, outsig)
+{
+}
+
+usrp1_base::~usrp1_base ()
+{
+ //delete d_usrp;
+}
+
+int
+_look_for_usrp(int which)
+{
+ // Try to open the specified usrp.
+
+ // param which: int >= 0 specifying which USRP to open
+ // type which: int
+
+ // return: Returns version number, or raises RuntimeError
+ // rtype: int
+
+ struct usb_device *d = usrp_find_device(which);
+ if(!d) {
+ throw "Unable to find USRP";
+ //raise RuntimeError, "Unable to find USRP #%d" % (which,);
+ }
+
+ return usrp_hw_rev(d);
+}
+
+void
+_ensure_rev2(int which)
+{
+ int v = _look_for_usrp(which);
+ if(!((v == 2) || (v = 4))) {
+ throw "Sorry, unsupported USRP revision";
+ // raise RuntimeError, "Sorry, unsupported USRP revision (rev=%d)" % (v,)
+ }
+}
+
+int hexint(unsigned int mask)
+{
+ /*
+ Convert unsigned masks into signed ints.
+
+ This allows us to use hex constants like 0xf0f0f0f2 when talking to
+ our hardware and not get screwed by them getting treated as python
+ longs.
+ */
+
+ if(mask >= (unsigned int)pow(2, 31)) {
+ return int(mask - (unsigned int)pow(2, 32));
+ }
+ return mask;
+}
+
+
+int
+usrp1_base::determine_rx_mux_value(int subdev_spec_side, int subdev_spec)
+{
+ /*
+ Determine appropriate Rx mux value as a function of the subdevice choosen
and the
+ characteristics of the respective daughterboard.
+
+ @param u: instance of USRP source
+ @param subdev_spec: return value from subdev option parser.
+ @type subdev_spec: (side, subdev), where side is 0 or 1 and subdev is 0
or 1
+ @returns: the Rx mux value
+
+ Figure out which A/D's to connect to the DDC.
+
+ Each daughterboard consists of 1 or 2 subdevices. (At this time,
+ all but the Basic Rx have a single subdevice. The Basic Rx
+ has two independent channels, treated as separate subdevices).
+ subdevice 0 of a daughterboard may use 1 or 2 A/D's. We determine this
+ by checking the is_quadrature() method. If subdevice 0 uses only a single
+ A/D, it's possible that the daughterboard has a second subdevice,
subdevice 1,
+ and it uses the second A/D.
+
+ If the card uses only a single A/D, we wire a zero into the DDC Q input.
+
+ (side, 0) says connect only the A/D's used by subdevice 0 to the DDC.
+ (side, 1) says connect only the A/D's used by subdevice 1 to the DDC.
+ */
+
+ int side = subdev_spec_side; // side A = 0, side B = 1
+
+ if(!((side == 0 || side == 1))) {
+ throw "Invalid subdev_spec";
+ //raise ValueError, "Invalid subdev_spec: %r:" % (subdev_spec,)
+ }
+
+ /*
+ db_base *db = u->d_db[side]; // This is a tuple of length 1 or 2
containing the subdevice
+ // classes for the selected side.
+
+ unsigned int subdev0_uses, subdev1_uses, uses;
+
+ // compute bitmasks of used A/D's
+
+ if(db[0].is_quadrature()) {
+ subdev0_uses = 0x3; // uses A/D 0 and 1
+ }
+ else {
+ subdev0_uses = 0x1; // uses A/D 0 only
+ }
+
+ if(&db[1] != NULL) { // test if we have 2 daughterboards
+ subdev1_uses = 0x2; // uses A/D 1 only
+ }
+ else {
+ subdev1_uses = 0x0; // uses no A/D (doesn't exist)
+ }
+
+ if(subdev_spec == 0) {
+ uses = subdev0_uses;
+ }
+ else if(subdev_spec == 1) {
+ uses = subdev1_uses;
+ }
+ else {
+ throw "Invalid subdev_spec";
+ //raise ValueError, "Invalid subdev_spec: %r: " % (subdev_spec,);
+ }
+
+ if(uses == 0) {
+ throw "Daughterboard doesn't have a subdevice 1";
+ //raise RuntimeError, "Daughterboard doesn't have a subdevice 1: %r: " %
(subdev_spec,);
+ }
+
+ bool swap_iq = db[0].i_and_q_swapped();
+
+ struct elements_t truth_table_elements[8] = {
+ // (side, uses, swap_iq) : mux_val
+ {0, 0x1, false, 0xf0f0f0f0},
+ {0, 0x2, false, 0xf0f0f0f1},
+ {0, 0x3, false, 0x00000010},
+ {0, 0x3, true, 0x00000001},
+ {1, 0x1, false, 0xf0f0f0f2},
+ {1, 0x2, false, 0xf0f0f0f3},
+ {1, 0x3, false, 0x00000032},
+ {1, 0x3, true, 0x00000023}
+ };
+
+ truth_table_t truth_table(truth_table_elements, 8);
+ //return hexint(truth_table.search(side, uses, swap_iq));
+ */
+
+ return 0x00000010;
+}
+
+
+int
+usrp1_base::determine_tx_mux_value(int subdev_spec_side, int subdev_spec)
+{
+ /*
+ Determine appropriate Tx mux value as a function of the subdevice choosen.
+
+ @param u: instance of USRP source
+ @param subdev_spec: return value from subdev option parser.
+ @type subdev_spec: (side, subdev), where side is 0 or 1 and subdev is 0
+ @returns: the Rx mux value
+
+ This is simpler than the rx case. Either you want to talk
+ to side A or side B. If you want to talk to both sides at once,
+ determine the value manually.
+ */
+
+ int side = subdev_spec_side; // side A = 0, side B = 1
+ if(!((side == 0) || (side == 1))) {
+ throw "Invalid subdev_spec";
+ //raise ValueError, "Invalid subdev_spec: %r:" % (subdev_spec,)
+ }
+
+ db_base *db = d_db[side];
+
+ if(db[0].i_and_q_swapped()) {
+ unsigned int mask[2] = {0x0089, 0x8900};
+ return hexint(mask[side]);
+ }
+ else {
+ unsigned int mask[2] = {0x0098, 0x9800};
+ return hexint(mask[side]);
+ }
+
+}
+
+db_base *
+usrp1_base::selected_subdev(int subdev_spec_side, int subdev_spec)
+{
+ /*
+ Return the user specified daughterboard subdevice.
+
+ @param subdev_spec: return value from subdev option parser.
+ @type subdev_spec: (side, subdev), where side is 0 or 1 and subdev is 0
or 1
+ @returns: an weakref to an instance derived from db_base
+ */
+
+ // FIXME: make sure we don't leave this in memory
+ return &d_db[subdev_spec_side][subdev_spec];
+ //return d_db;
+}
+
+
+float
+calc_dxc_freq(float target_freq, float baseband_freq, long fs, bool &inverted)
+{
+ /*
+ Calculate the frequency to use for setting the digital up or down
converter.
+
+ @param target_freq: desired RF frequency (Hz)
+ @type target_freq: number
+ @param baseband_freq: the RF frequency that corresponds to DC in the IF.
+ @type baseband_freq: number
+ @param fs: converter sample rate
+ @type fs: number
+
+ @returns: 2-tuple (ddc_freq, inverted) where ddc_freq is the value
+ for the ddc and inverted is True if we're operating in an inverted
+ Nyquist zone.
+ */
+
+ float delta = target_freq - baseband_freq;
+
+ if(delta >= 0) {
+ while(delta > fs) {
+ delta -= fs;
+ }
+ if(delta <= fs/2) {
+ inverted = false;
+ return (-delta); // non-inverted region
+ }
+ else {
+ inverted = true;
+ return (delta - fs); // inverted region
+ }
+ }
+ else {
+ while(delta < -fs) {
+ delta += fs;
+ }
+ if(delta >= -fs/2) {
+ inverted = false;
+ return (-delta); // non-inverted region
+ }
+ else {
+ inverted = true;
+ return (delta + fs); // inverted region
+ }
+ }
+}
+
+
+//******************************************************************************/
+// Utilities to pick the subdevice tuple (side, spec)
+//******************************************************************************/
+
+struct subdev_spec
+pick_tx_subdevice(usrp1_base &u)
+{
+ /*
+ The user didn't specify a tx subdevice on the command line.
+ Try for one of these, in order: FLEX_400, FLEX_900, FLEX_1200, FLEX_2400,
+ BASIC_TX, whatever's on side A.
+
+ @return a subdev_spec
+ */
+
+ int dbid[5] = {USRP_DBID_FLEX_400_TX,
+ USRP_DBID_FLEX_900_TX,
+ USRP_DBID_FLEX_1200_TX,
+ USRP_DBID_FLEX_2400_TX,
+ USRP_DBID_BASIC_TX};
+
+ return pick_subdev(u, dbid, 5);
+}
+
+struct subdev_spec
+pick_rx_subdevice(usrp1_base &u)
+{
+ /*
+ The user didn't specify an rx subdevice on the command line.
+ Try for one of these, in order: FLEX_400, FLEX_900, FLEX_1200, FLEX_2400,
+ TV_RX, DBS_RX, BASIC_RX, whatever's on side A.
+
+ @return a subdev_spec
+ */
+
+ int dbid[9] = {USRP_DBID_FLEX_400_RX,
+ USRP_DBID_FLEX_900_RX,
+ USRP_DBID_FLEX_1200_RX,
+ USRP_DBID_FLEX_2400_RX,
+ USRP_DBID_TV_RX,
+ USRP_DBID_TV_RX_REV_2,
+ USRP_DBID_DBS_RX,
+ USRP_DBID_DBS_RX_REV_2_1,
+ USRP_DBID_BASIC_RX};
+
+ return pick_subdev(u, dbid, 9);
+}
+
+struct subdev_spec
+pick_subdev(usrp1_base &u, int candidates[], int ncandidates)
+{
+ /*
+ @param u: usrp instance
+ @param candidates: list of dbids
+ @returns: subdev specification
+ */
+
+ struct subdev_spec ss;
+
+ int db0 = u.db(0)->dbid();
+ int db1 = u.db(1)->dbid();
+ for(int i=0; i < ncandidates; i++) {
+ if(candidates[i] == db0) {
+ ss.side = 0;
+ ss.spec = 0;
+ return ss;
+ }
+ if(candidates[i] == db1) {
+ ss.side = 1;
+ ss.spec = 0;
+ return ss;
+ }
+ }
+ if(db0 >= 0) {
+ ss.side = 0;
+ ss.spec = 0;
+ return ss;
+ }
+ if(db1 >= 0) {
+ ss.side = 1;
+ ss.spec = 0;
+ return ss;
+ }
+
+ throw "No suitable daughterboard found!";
+ //raise RuntimeError, "No suitable daughterboard found!";
+}
+
Added: gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_base.h
===================================================================
--- gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_base.h
(rev 0)
+++ gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_base.h
2008-07-13 17:15:29 UTC (rev 8872)
@@ -0,0 +1,387 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2008 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifndef INCLUDED_USRP1_BASE_H
+#define INCLUDED_USRP1_BASE_H
+
+#include <stdexcept>
+#include <gr_io_signature.h>
+#include <gr_sync_block.h>
+#include <usrp_standard.h>
+#include <usrp_spi_defs.h>
+#include <usrp_dbid.h>
+#include <usrp_prims.h>
+#include <fpga_regs_standard.h>
+#include <fpga_regs_common.h>
+#include <iostream>
+#include <db_base.h>
+
+#define FPGA_MODE_NORMAL usrp_standard_rx::FPGA_MODE_NORMAL
+#define FPGA_MODE_LOOPBACK usrp_standard_rx::FPGA_MODE_LOOPBACK
+#define FPGA_MODE_COUNTING usrp_standard_rx::FPGA_MODE_COUNTING
+
+
+/*!
+ * \brief abstract interface to Universal Software Radio Peripheral (Rev 1)
+ */
+class usrp1_base : public gr_sync_block
+{
+ protected:
+ usrp_standard_common *d_usrp;
+ int d_fpga_caps;
+ db_base *d_db[2];
+
+ usrp1_base (const std::string &name, gr_io_signature_sptr insig,
gr_io_signature_sptr outsig);
+
+ public:
+ //! magic value used on alternate register read interfaces
+ static const int READ_FAILED = -99999;
+
+ virtual ~usrp1_base ();
+
+ db_base * db(int side) { return d_db[side]; }
+
+ int determine_tx_mux_value(int subdev_spec_side, int subdev_spec);
+ int determine_rx_mux_value(int subdev_spec_side, int subdev_spec);
+ //db_base_sptr selected_subdev(int subdev_spec_side, int subdev_spec);
+ db_base * selected_subdev(int subdev_spec_side, int subdev_spec);
+
+ virtual bool start() {return false;}
+ virtual bool stop() {return false;}
+
+ virtual bool set_nchannels (int nchan) {return false;}
+ virtual bool set_mux (int mux) {return false;}
+
+ virtual void set_verbose (bool verbose) {}
+
+ // FIXME: throw exceptions properly
+ virtual bool set_tx_freq (int channel, double freq) { throw 0; }
+ virtual bool set_rx_freq (int channel, double freq) { throw 0; }
+ virtual double tx_freq (int channel) const { throw 0; }
+ virtual double rx_freq (int channel) const { throw 0; }
+
+ /*!
+ * \brief Set Programmable Gain Amplifier (PGA)
+ *
+ * \param which which A/D [0,3]
+ * \param gain_in_db gain value (linear in dB)
+ *
+ * gain is rounded to closest setting supported by hardware.
+ *
+ * \returns true iff sucessful.
+ *
+ * \sa pga_min(), pga_max(), pga_db_per_step()
+ */
+ virtual bool set_pga (int which, double gain_in_db) {return false;}
+
+ /*!
+ * \brief Return programmable gain amplifier gain setting in dB.
+ *
+ * \param which which A/D [0,3]
+ */
+ virtual double pga (int which) const {return 0;}
+
+ /*!
+ * \brief Return minimum legal PGA setting in dB.
+ */
+ virtual double pga_min () const {return 0;}
+
+ /*!
+ * \brief Return maximum legal PGA setting in dB.
+ */
+ virtual double pga_max () const {return 0;}
+
+ /*!
+ * \brief Return hardware step size of PGA (linear in dB).
+ */
+ virtual double pga_db_per_step () const {return 0;}
+
+ // ACCESSORS
+
+ virtual long fpga_master_clock_freq() const {return 0;}
+ virtual long converter_rate() const {return 0;}
+
+ virtual int nchannels () const {return 0;}
+ virtual int mux () const {return 0;}
+ virtual int noverruns () const {return 0;}
+
+ /*!
+ * \brief Return daughterboard ID for given daughterboard slot [0,1].
+ *
+ * \return daughterboard id >= 0 if successful
+ * \return -1 if no daugherboard
+ * \return -2 if invalid EEPROM on daughterboard
+ */
+ virtual int daughterboard_id (int which_dboard) const {return 0;}
+
+ /*!
+ * \brief Write auxiliary digital to analog converter.
+ *
+ * \param which_dboard [0,1] which d'board
+ * N.B., SLOT_TX_A and SLOT_RX_A share the same
AUX DAC's.
+ * SLOT_TX_B and SLOT_RX_B share the same AUX
DAC's.
+ * \param which_dac [2,3] TX slots must use only 2 and 3.
+ * \param value [0,4095]
+ * \returns true iff successful
+ */
+ virtual bool write_aux_dac (int which_board, int which_dac, unsigned int
value) {return false;}
+
+ /*!
+ * \brief Read auxiliary analog to digital converter.
+ *
+ * \param which_dboard [0,1] which d'board
+ * \param which_adc [0,1]
+ * \returns value in the range [0,4095] if successful, else READ_FAILED.
+ */
+ virtual unsigned int read_aux_adc (int which_dboard, int which_adc) {return
0;}
+
+ /*!
+ * \brief Write EEPROM on motherboard or any daughterboard.
+ * \param i2c_addr I2C bus address of EEPROM
+ * \param eeprom_offset byte offset in EEPROM to begin writing
+ * \param buf the data to write
+ * \returns true iff sucessful
+ */
+ virtual bool write_eeprom (int i2c_addr, int eeprom_offset, const
std::string buf) {return false;}
+
+ /*!
+ * \brief Write EEPROM on motherboard or any daughterboard.
+ * \param i2c_addr I2C bus address of EEPROM
+ * \param eeprom_offset byte offset in EEPROM to begin reading
+ * \param len number of bytes to read
+ * \returns the data read if successful, else a zero length string.
+ */
+ virtual std::string read_eeprom (int i2c_addr, int eeprom_offset, int len)
{return NULL;}
+
+ /*!
+ * \brief Write to I2C peripheral
+ * \param i2c_addr I2C bus address (7-bits)
+ * \param buf the data to write
+ * \returns true iff successful
+ * Writes are limited to a maximum of of 64 bytes.
+ */
+ virtual bool write_i2c (int i2c_addr, const std::string buf) {
printf("usrp1_base::i2c\n"); return false;}
+
+ /*!
+ * \brief Read from I2C peripheral
+ * \param i2c_addr I2C bus address (7-bits)
+ * \param len number of bytes to read
+ * \returns the data read if successful, else a zero length string.
+ * Reads are limited to a maximum of of 64 bytes.
+ */
+ virtual std::string read_i2c (int i2c_addr, int len) {return NULL;}
+
+ /*!
+ * \brief Set ADC offset correction
+ * \param which which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q...
+ * \param offset 16-bit value to subtract from raw ADC input.
+ */
+ virtual bool set_adc_offset (int which, unsigned int offset) {return false;}
+
+ /*!
+ * \brief Set DAC offset correction
+ * \param which which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q...
+ * \param offset 10-bit offset value (ambiguous format: See AD9862
datasheet).
+ * \param offset_pin 1-bit value. If 0 offset applied to -ve differential
pin;
+ * If 1 offset applied to +ve differential
pin.
+ */
+ virtual bool set_dac_offset (int which, int offset, int offset_pin) {return
false;}
+
+ /*!
+ * \brief Control ADC input buffer
+ * \param which which ADC[0,3]
+ * \param bypass if non-zero, bypass input buffer and connect input
+ * directly to switched cap SHA input of RxPGA.
+ */
+ virtual bool set_adc_buffer_bypass (int which, bool bypass) {return false;}
+
+ /*!
+ * \brief return the usrp's serial number.
+ *
+ * \returns non-zero length string iff successful.
+ */
+ virtual std::string serial_number() {return NULL;}
+
+ /*!
+ * \brief Write direction register (output enables) for pins that go to
daughterboard.
+ *
+ * \param which_dboard [0,1] which d'board
+ * \param value value to write into register
+ * \param mask which bits of value to write into reg
+ *
+ * Each d'board has 16-bits of general purpose i/o.
+ * Setting the bit makes it an output from the FPGA to the d'board.
+ *
+ * This register is initialized based on a value stored in the
+ * d'board EEPROM. In general, you shouldn't be using this routine
+ * without a very good reason. Using this method incorrectly will
+ * kill your USRP motherboard and/or daughterboard.
+ */
+ virtual bool _write_oe (int which_dboard, unsigned int value, unsigned int
mask) {return false;}
+
+ /*!
+ * \brief Write daughterboard i/o pin value
+ *
+ * \param which_dboard [0,1] which d'board
+ * \param value value to write into register
+ * \param mask which bits of value to write into reg
+ */
+ virtual bool write_io (int which_dboard, unsigned int value, unsigned int
mask) {return false;}
+
+ /*!
+ * \brief Read daughterboard i/o pin value
+ *
+ * \param which_dboard [0,1] which d'board
+ * \returns register value if successful, else READ_FAILED
+ */
+ virtual unsigned int read_io (int which_dboard) {return 0;}
+
+ // ----------------------------------------------------------------
+ // internal routines...
+ // You probably shouldn't be using these...
+ // ----------------------------------------------------------------
+
+ /*!
+ * \brief Write FPGA register.
+ * \param regno 7-bit register number
+ * \param value 32-bit value
+ * \returns true iff successful
+ */
+ virtual bool _write_fpga_reg (int regno, unsigned int value) {return false;}
//< 7-bit regno, 32-bit value
+
+ /*!
+ * \brief Write FPGA register masked.
+ * \param regno 7-bit register number
+ * \param value 16-bit value
+ * \param mask 16-bit mask
+ * \returns true iff successful
+ */
+ virtual bool _write_fpga_reg_masked (int regno, unsigned int value, int
mask) {return false;} //< 7-bit regno, 16-bit value, 16-bit mask
+
+ /*!
+ * \brief Read FPGA register.
+ * \param regno 7-bit register number
+ * \returns register value if successful, else READ_FAILED
+ */
+ virtual unsigned int _read_fpga_reg (int regno) {return 0;}
+
+ /*!
+ * \brief Write AD9862 register.
+ * \param which_codec 0 or 1
+ * \param regno 6-bit register number
+ * \param value 8-bit value
+ * \returns true iff successful
+ */
+ virtual bool _write_9862 (int which_codec, int regno, unsigned char value)
{return false;}
+
+ /*!
+ * \brief Read AD9862 register.
+ * \param which_codec 0 or 1
+ * \param regno 6-bit register number
+ * \returns register value if successful, else READ_FAILED
+ */
+ virtual unsigned int _read_9862 (int which_codec, int regno) const {return
0;}
+
+ /*!
+ * \brief Write data to SPI bus peripheral.
+ *
+ * \param optional_header 0,1 or 2 bytes to write before buf.
+ * \param enables bitmask of peripherals to write. See
usrp_spi_defs.h
+ * \param format transaction format. See usrp_spi_defs.h
SPI_FMT_*
+ * \param buf the data to write
+ * \returns true iff successful
+ * Writes are limited to a maximum of 64 bytes.
+ *
+ * If \p format specifies that optional_header bytes are present, they are
+ * written to the peripheral immediately prior to writing \p buf.
+ */
+ virtual bool _write_spi (int optional_header, int enables, int format,
std::string buf) {return false;}
+
+ /*
+ * \brief Read data from SPI bus peripheral.
+ *
+ * \param optional_header 0,1 or 2 bytes to write before buf.
+ * \param enables bitmask of peripheral to read. See
usrp_spi_defs.h
+ * \param format transaction format. See usrp_spi_defs.h
SPI_FMT_*
+ * \param len number of bytes to read. Must be in
[0,64].
+ * \returns the data read if sucessful, else a zero length string.
+ *
+ * Reads are limited to a maximum of 64 bytes.
+ *
+ * If \p format specifies that optional_header bytes are present, they
+ * are written to the peripheral first. Then \p len bytes are read from
+ * the peripheral and returned.
+ */
+ virtual std::string _read_spi (int optional_header, int enables, int format,
int len) {return NULL;}
+
+ //tune_result tune(int chan, db_base *subdev, float target_freq);
+
+ bool has_rx_halfband()
+ {
+ return (d_fpga_caps & bmFR_RB_CAPS_RX_HAS_HALFBAND) != 0;
+ }
+
+ bool has_tx_halfband()
+ {
+ return (d_fpga_caps & bmFR_RB_CAPS_TX_HAS_HALFBAND) != 0;
+ }
+
+ int nddc()
+ {
+ return (d_fpga_caps & bmFR_RB_CAPS_NDDC_MASK) >> bmFR_RB_CAPS_NDDC_SHIFT;
+ }
+
+ int nduc()
+ {
+ return (d_fpga_caps & bmFR_RB_CAPS_NDUC_MASK) >> bmFR_RB_CAPS_NDUC_SHIFT;
+ }
+};
+
+
+
+/*
+ # ------------------------------------------------------------------------
+ # utilities
+ # ------------------------------------------------------------------------
+*/
+
+
+int _look_for_usrp(int which);
+void _ensure_rev2(int which);
+
+float calc_dxc_freq(float target_freq, float baseband_freq, long fs, bool
&inverted);
+
+struct subdev_spec
+{
+ int side;
+ int spec;
+};
+
+struct subdev_spec pick_tx_subdevice(usrp1_base &u);
+struct subdev_spec pick_rx_subdevice(usrp1_base &u);
+struct subdev_spec pick_subdev(usrp1_base &u, int candidates[], int
ncandidates);
+
+//bool tune(usrp1_base *u, int chan, db_base *subdev, float target_freq,
tune_result_sptr res);
+//bool tune(usrp1_base *u, int chan, db_base *subdev, float target_freq);
+
+
+#endif /* INCLUDED_USRP1_BASE_H */
Added: gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_base.i
===================================================================
--- gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_base.i
(rev 0)
+++ gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_base.i
2008-07-13 17:15:29 UTC (rev 8872)
@@ -0,0 +1,111 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2004,2008 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+%{
+#include "usrp1_base.h"
+%}
+
+// ================================================================
+// abstract classes
+// ================================================================
+
+
+class usrp1_base : public gr_sync_block
+{
+ private:
+ usrp_standard_common *d_usrp;
+ int d_fpga_caps;
+ db_base *d_db;
+
+ protected:
+\ usrp1_base () {}
+
+ public:
+ //! magic value used on alternate register read interfaces
+ static const int READ_FAILED = -99999;
+
+ virtual ~usrp1_base ();
+
+ db_base * db(int side);
+
+
+ int determine_tx_mux_value(int subdev_spec_side, int subdev_spec);
+ int determine_rx_mux_value(int subdev_spec_side, int subdev_spec);
+ //db_base_sptr selected_subdev(int subdev_spec_side, int subdev_spec);
+ db_base * selected_subdev(int subdev_spec_side, int subdev_spec);
+
+ virtual bool start() {return false;}
+ virtual bool stop() {return false;}
+
+ virtual bool set_nchannels (int nchan) {return false;}
+ virtual bool set_mux (int mux) {return false;}
+
+ virtual void set_verbose (bool verbose) {}
+
+ virtual bool set_tx_freq (int channel, double freq);
+ virtual bool set_rx_freq (int channel, double freq);
+ virtual double tx_freq (int channel) const;
+ virtual double rx_freq (int channel) const;
+
+ virtual bool set_pga (int which, double gain_in_db);
+ virtual double pga (int which) const;
+ virtual double pga_min () const;
+ virtual double pga_max () const;
+ virtual double pga_db_per_step () const;
+
+ // ACCESSORS
+
+ virtual long fpga_master_clock_freq() const;
+ virtual long converter_rate() const;
+
+ virtual int nchannels () const;
+ virtual int mux () const;
+ virtual int noverruns () const;
+ virtual int daughterboard_id (int which_dboard) const;
+ virtual bool write_aux_dac (int which_board, int which_dac, unsigned int
value);
+ virtual unsigned int read_aux_adc (int which_dboard, int which_adc);
+ virtual bool write_eeprom (int i2c_addr, int eeprom_offset, const
std::string buf);
+ virtual std::string read_eeprom (int i2c_addr, int eeprom_offset, int len);
+ virtual bool write_i2c (int i2c_addr, const std::string buf);
+ virtual std::string read_i2c (int i2c_addr, int len);
+ virtual bool set_adc_offset (int which, unsigned int offset);
+ virtual bool set_dac_offset (int which, int offset, int offset_pin);
+ virtual bool set_adc_buffer_bypass (int which, bool bypass);
+ virtual std::string serial_number();
+ virtual bool _write_oe (int which_dboard, unsigned int value, unsigned int
mask);
+ virtual bool write_io (int which_dboard, unsigned int value, unsigned int
mask);
+ virtual unsigned int read_io (int which_dboard);
+ virtual bool _write_fpga_reg (int regno, unsigned int value);
+ virtual bool _write_fpga_reg_masked (int regno, unsigned int value, int
mask);
+ virtual unsigned int _read_fpga_reg (int regno);
+ virtual bool _write_9862 (int which_codec, int regno, unsigned char value);
+ virtual unsigned int _read_9862 (int which_codec, int regno) const;
+ virtual bool _write_spi (int optional_header, int enables, int format,
std::string buf);
+ virtual std::string _read_spi (int optional_header, int enables, int format,
int len);
+
+ //tune_result tune(int chan, db_base *subdev, float target_freq);
+
+ bool has_rx_halfband();
+ bool has_tx_halfband();
+ int nddc();
+ int nduc();
+};
Added: gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink.i
===================================================================
--- gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink.i
(rev 0)
+++ gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink.i
2008-07-13 17:15:29 UTC (rev 8872)
@@ -0,0 +1,161 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2008 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+%{
+#include "usrp1_sink_base.h"
+#include "usrp1_sink_c.h"
+ //#include "usrp1_source_s.h"
+%}
+
+// ================================================================
+// abstract classes
+// ================================================================
+
+class usrp1_sink_base : public usrp1_base
+{
+protected:
+ usrp1_sink_base (const std::string &name,
+ gr_io_signature_sptr input_signature,
+ int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+ virtual void copy_to_usrp_buffer (gr_vector_const_void_star &input_items,
+ int input_index,
+ int input_items_available,
+ int &input_items_consumed,
+ void *usrp_buffer,
+ int usrp_buffer_length,
+ int &bytes_written) = 0;
+ public:
+ ~usrp1_sink_base ();
+
+ bool set_interp_rate (unsigned int rate);
+ bool set_nchannels (int nchan);
+ bool set_mux (int mux);
+ bool set_tx_freq (int channel, double freq);
+ void set_verbose (bool verbose);
+
+ // ACCESSORS
+
+ long fpga_master_clock_freq() const;
+ long converter_rate() const;
+ long dac_rate() const;
+ long dac_freq () const;
+
+ unsigned int interp_rate () const;
+ double tx_freq (int channel) const;
+ int nunderruns () const;
+ bool set_pga (int which, double gain_in_db);
+ double pga (int which) const;
+ double pga_min () const;
+ double pga_max () const;
+ double pga_db_per_step () const;
+ int daughterboard_id (int which_dboard) const;
+ bool set_adc_offset (int which, int offset);
+ bool set_dac_offset (int which, int offset, int offset_pin);
+ bool set_adc_buffer_bypass (int which, bool bypass);
+ std::string serial_number();
+ bool _write_oe (int which_dboard, int value, int mask);
+ bool write_io (int which_dboard, int value, int mask);
+ int read_io (int which_dboard);
+
+ bool write_aux_dac (int which_dboard, int which_dac, int value);
+ int read_aux_adc (int which_dboard, int which_adc);
+ bool write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf);
+ std::string read_eeprom (int i2c_addr, int eeprom_offset, int len);
+ bool write_i2c (int i2c_addr, const std::string buf);
+ std::string read_i2c (int i2c_addr, int len);
+
+ bool _write_fpga_reg (int regno, int value);
+ int _read_fpga_reg (int regno);
+ bool _write_9862 (int which_codec, int regno, unsigned char value);
+ int _read_9862 (int which_codec, int regno) const;
+ bool _write_spi (int optional_header, int enables, int format, std::string
buf);
+ std::string _read_spi (int optional_header, int enables, int format, int
len);
+};
+
+
+
+// ================================================================
+// concrete sinks
+// ================================================================
+
+
+GR_SWIG_BLOCK_MAGIC(usrp1,sink_c)
+
+usrp1_sink_c_sptr
+usrp1_make_sink_c (int which_board=0,
+ unsigned int interp_rate=128,
+ int nchan=1,
+ int mux=0x98,
+ int fusb_block_size=0,
+ int fusb_nblocks=0,
+ const std::string fpga_filename="",
+ const std::string firmware_filename=""
+ ) throw (std::runtime_error);
+
+
+class usrp1_sink_c : public usrp1_sink_base {
+ protected:
+ usrp1_sink_c (int which_board, unsigned int interp_rate,
+ int nchan, int mux, int fusb_block_size, int fusb_nblocks,
+ const std::string fpga_filename, const std::string
fgpa_filename);
+
+ public:
+ ~usrp1_sink_c ();
+};
+
+// ----------------------------------------------------------------
+
+#if 0
+GR_SWIG_BLOCK_MAGIC(usrp1,sink_s)
+
+usrp1_sink_s_sptr
+usrp1_make_sink_s (int which_board,
+ unsigned int interp_rate,
+ int nchan,
+ int mux,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+
+class usrp1_sink_s : public usrp1_sink_base {
+ protected:
+ usrp1_sink_s (int which_board, unsigned int interp_rate,
+ int nchan, int mux);
+
+ public:
+ ~usrp1_sink_s ();
+};
+
+#endif
+
Modified:
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_base.cc
===================================================================
--- gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_base.cc
2008-07-13 16:40:06 UTC (rev 8871)
+++ gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_base.cc
2008-07-13 17:15:29 UTC (rev 8872)
@@ -42,9 +42,7 @@
const std::string fpga_filename,
const std::string firmware_filename
) throw (std::runtime_error)
- : gr_sync_block (name,
- input_signature,
- gr_make_io_signature (0, 0, 0)),
+ : usrp1_base(name, input_signature, gr_make_io_signature (0, 0, 0)),
d_nunderruns (0)
{
d_usrp = usrp_standard_tx::make (which_board,
@@ -206,12 +204,12 @@
}
bool
-usrp1_sink_base::write_aux_dac (int which_dboard, int which_dac, int value)
+usrp1_sink_base::write_aux_dac (int which_dboard, int which_dac, unsigned int
value)
{
return d_usrp->write_aux_dac (which_dboard, which_dac, value);
}
-int
+unsigned int
usrp1_sink_base::read_aux_adc (int which_dboard, int which_adc)
{
return d_usrp->read_aux_adc (which_dboard, which_adc);
@@ -274,11 +272,12 @@
int
usrp1_sink_base::daughterboard_id (int which) const
{
+ //printf("usrp1_sink_base::daughterboard_id()\n");
return d_usrp->daughterboard_id (which);
}
bool
-usrp1_sink_base::set_adc_offset (int which, int offset)
+usrp1_sink_base::set_adc_offset (int which, unsigned int offset)
{
return d_usrp->set_adc_offset (which, offset);
}
@@ -302,18 +301,18 @@
}
bool
-usrp1_sink_base::_write_oe (int which_dboard, int value, int mask)
+usrp1_sink_base::_write_oe (int which_dboard, unsigned int value, unsigned int
mask)
{
return d_usrp->_write_oe (which_dboard, value, mask);
}
bool
-usrp1_sink_base::write_io (int which_dboard, int value, int mask)
+usrp1_sink_base::write_io (int which_dboard, unsigned int value, unsigned int
mask)
{
return d_usrp->write_io (which_dboard, value, mask);
}
-int
+unsigned int
usrp1_sink_base::read_io (int which_dboard)
{
return d_usrp->read_io (which_dboard);
@@ -322,12 +321,12 @@
// internal routines...
bool
-usrp1_sink_base::_write_fpga_reg (int regno, int value)
+usrp1_sink_base::_write_fpga_reg (int regno, unsigned int value)
{
return d_usrp->_write_fpga_reg (regno, value);
}
-int
+unsigned int
usrp1_sink_base::_read_fpga_reg (int regno)
{
return d_usrp->_read_fpga_reg (regno);
@@ -339,7 +338,7 @@
return d_usrp->_write_9862 (which_codec, regno, value);
}
-int
+unsigned int
usrp1_sink_base::_read_9862 (int which_codec, int regno) const
{
return d_usrp->_read_9862 (which_codec, regno);
Modified:
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_base.h
===================================================================
--- gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_base.h
2008-07-13 16:40:06 UTC (rev 8871)
+++ gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_base.h
2008-07-13 17:15:29 UTC (rev 8872)
@@ -1,6 +1,6 @@
/* -*- c++ -*- */
/*
- * Copyright 2004,2006 Free Software Foundation, Inc.
+ * Copyright 2004,2006,2008 Free Software Foundation, Inc.
*
* This file is part of GNU Radio
*
@@ -23,7 +23,7 @@
#ifndef INCLUDED_USRP1_SINK_BASE_H
#define INCLUDED_USRP1_SINK_BASE_H
-#include <gr_sync_block.h>
+#include <usrp1_base.h>
#include <stdexcept>
class usrp_standard_tx;
@@ -32,7 +32,8 @@
/*!
* \brief abstract interface to Universal Software Radio Peripheral Tx path
(Rev 1)
*/
-class usrp1_sink_base : public gr_sync_block {
+class usrp1_sink_base : public usrp1_base
+{
private:
usrp_standard_tx *d_usrp;
int d_nunderruns;
@@ -70,10 +71,7 @@
int &bytes_written) = 0;
public:
- //! magic value used on alternate register read interfaces
- static const int READ_FAILED = -99999;
-
-
+
~usrp1_sink_base ();
int work (int noutput_items,
@@ -175,7 +173,7 @@
* \param value [0,4095]
* \returns true iff successful
*/
- bool write_aux_dac (int which_board, int which_dac, int value);
+ bool write_aux_dac (int which_board, int which_dac, unsigned int value);
/*!
* \brief Read auxiliary analog to digital converter.
@@ -184,7 +182,7 @@
* \param which_adc [0,1]
* \returns value in the range [0,4095] if successful, else READ_FAILED.
*/
- int read_aux_adc (int which_dboard, int which_adc);
+ unsigned int read_aux_adc (int which_dboard, int which_adc);
/*!
* \brief Write EEPROM on motherboard or any daughterboard.
@@ -227,7 +225,7 @@
* \param which which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q...
* \param offset 16-bit value to subtract from raw ADC input.
*/
- bool set_adc_offset (int which, int offset);
+ bool set_adc_offset (int which, unsigned int offset);
/*!
* \brief Set DAC offset correction
@@ -268,7 +266,7 @@
* without a very good reason. Using this method incorrectly will
* kill your USRP motherboard and/or daughterboard.
*/
- bool _write_oe (int which_dboard, int value, int mask);
+ bool _write_oe (int which_dboard, unsigned int value, unsigned int mask);
/*!
* \brief Write daughterboard i/o pin value
@@ -277,7 +275,7 @@
* \param value value to write into register
* \param mask which bits of value to write into reg
*/
- bool write_io (int which_dboard, int value, int mask);
+ bool write_io (int which_dboard, unsigned int value, unsigned int mask);
/*!
* \brief Read daughterboard i/o pin value
@@ -285,7 +283,7 @@
* \param which_dboard [0,1] which d'board
* \returns register value if successful, else READ_FAILED
*/
- int read_io (int which_dboard);
+ unsigned int read_io (int which_dboard);
//
// internal routines...
@@ -297,14 +295,14 @@
* \param value 32-bit value
* \returns true iff successful
*/
- bool _write_fpga_reg (int regno, int value); //< 7-bit regno, 32-bit value
+ bool _write_fpga_reg (int regno, unsigned int value); //< 7-bit
regno, 32-bit value
/*!
* \brief Read FPGA register.
* \param regno 7-bit register number
* \returns register value if successful, else READ_FAILED
*/
- int _read_fpga_reg (int regno);
+ unsigned int _read_fpga_reg (int regno);
/*!
* \brief Write AD9862 register.
@@ -321,7 +319,7 @@
* \param regno 6-bit register number
* \returns register value if successful, else READ_FAILED
*/
- int _read_9862 (int which_codec, int regno) const;
+ unsigned int _read_9862 (int which_codec, int regno) const;
/*!
* \brief Write data to SPI bus peripheral.
Modified: gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_c.cc
===================================================================
--- gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_c.cc
2008-07-13 16:40:06 UTC (rev 8871)
+++ gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_c.cc
2008-07-13 17:15:29 UTC (rev 8872)
@@ -1,6 +1,6 @@
/* -*- c++ -*- */
/*
- * Copyright 2004,2006 Free Software Foundation, Inc.
+ * Copyright 2004,2006,2008 Free Software Foundation, Inc.
*
* This file is part of GNU Radio
*
@@ -52,6 +52,7 @@
}
+
usrp1_sink_c::usrp1_sink_c (int which_board,
unsigned int interp_rate,
int nchan,
@@ -67,6 +68,13 @@
fusb_block_size, fusb_nblocks,
fpga_filename, firmware_filename)
{
+ _ensure_rev2(which_board);
+
+ int dbid = daughterboard_id(which_board);
+
+ //instantiate_dbs(dbid, d_db[which_board], this, which_board);
+ d_db[0] = instantiate_dbs(dbid, this, which_board);
+ d_db[1] = instantiate_dbs(dbid, this, which_board);
}
usrp1_sink_c::~usrp1_sink_c ()
Modified: gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_c.h
===================================================================
--- gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_c.h
2008-07-13 16:40:06 UTC (rev 8871)
+++ gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_sink_c.h
2008-07-13 17:15:29 UTC (rev 8872)
@@ -1,6 +1,6 @@
/* -*- c++ -*- */
/*
- * Copyright 2004 Free Software Foundation, Inc.
+ * Copyright 2004, 2008 Free Software Foundation, Inc.
*
* This file is part of GNU Radio
*
@@ -24,6 +24,7 @@
#define INCLUDED_USRP1_SINK_C_H
#include <usrp1_sink_base.h>
+#include <db_boards.h>
class usrp1_sink_c;
typedef boost::shared_ptr<usrp1_sink_c> usrp1_sink_c_sptr;
@@ -32,14 +33,14 @@
// public shared_ptr constructor
usrp1_sink_c_sptr
-usrp1_make_sink_c (int which_board,
- unsigned int interp_rate,
- int nchan,
- int mux,
- int fusb_block_size,
- int fusb_nblocks,
- const std::string fpga_filename,
- const std::string firmware_filename
+usrp1_make_sink_c (int which_board=0,
+ unsigned int interp_rate=128,
+ int nchan=1,
+ int mux=0x98,
+ int fusb_block_size=0,
+ int fusb_nblocks=0,
+ const std::string fpga_filename="",
+ const std::string firmware_filename=""
) throw (std::runtime_error);
Added: gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source.i
===================================================================
--- gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source.i
(rev 0)
+++ gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source.i
2008-07-13 17:15:29 UTC (rev 8872)
@@ -0,0 +1,188 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2008 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with GNU Radio; see the file COPYING. If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+%{
+#include "usrp1_source_base.h"
+#include "usrp1_source_c.h"
+ //#include "usrp1_source_s.h"
+%}
+
+
+// ================================================================
+// abstract classes
+// ================================================================
+
+class usrp1_source_base : public usrp1_base
+{
+ protected:
+ usrp1_source_base (const std::string &name,
+ gr_io_signature_sptr output_signature,
+ int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+ virtual int ninput_bytes_reqd_for_noutput_items (int noutput_items) = 0;
+ unsigned int sizeof_basic_sample() const;
+ virtual void copy_from_usrp_buffer (gr_vector_void_star &output_items,
+ int output_index,
+ int output_items_available,
+ int &output_items_produced,
+ const void *usrp_buffer,
+ int usrp_buffer_length,
+ int &bytes_read) = 0;
+
+ public:
+ ~usrp1_source_base ();
+
+ int work (int noutput_items,
+ gr_vector_const_void_star &input_items,
+ gr_vector_void_star &output_items);
+
+ bool start();
+ bool stop();
+
+ bool set_decim_rate (unsigned int rate);
+ bool set_nchannels (int nchan);
+ bool set_mux (int mux);
+ bool set_rx_freq (int channel, double freq);
+ bool set_fpga_mode (int mode);
+ void set_verbose (bool verbose);
+ bool set_ddc_phase(int channel, int phase);
+ bool set_pga (int which, double gain_in_db);
+ double pga (int which) const;
+ double pga_min () const;
+ double pga_max () const;
+ double pga_db_per_step () const;
+
+ // ACCESSORS
+
+ long fpga_master_clock_freq() const;
+ long converter_rate() const;
+ long adc_rate() const;
+ long adc_freq() const;
+
+ unsigned int decim_rate () const;
+ int nchannels () const;
+ int mux () const;
+ double rx_freq (int channel) const;
+ int noverruns () const;
+
+ int daughterboard_id (int which_dboard) const;
+ bool write_aux_dac (int which_board, int which_dac, unsigned int value);
+ unsigned int read_aux_adc (int which_dboard, int which_adc);
+ bool write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf);
+ std::string read_eeprom (int i2c_addr, int eeprom_offset, int len);
+ bool write_i2c (int i2c_addr, const std::string buf);
+ std::string read_i2c (int i2c_addr, int len);
+ bool set_adc_offset (int which, unsigned int offset);
+ bool set_dac_offset (int which, int offset, int offset_pin);
+ bool set_adc_buffer_bypass (int which, bool bypass);
+ std::string serial_number();
+ bool _write_oe (int which_dboard, unsigned int value, unsigned int mask);
+ bool write_io (int which_dboard, unsigned int value, unsigned int mask);
+ unsigned int read_io (int which_dboard);
+ bool set_dc_offset_cl_enable(int bits, int mask);
+ bool set_format(unsigned int format);
+ unsigned int format () const;
+
+ static unsigned int make_format(int width=16, int shift=0,
+ bool want_q=true, bool bypass_halfband=false);
+ static int format_width(unsigned int format);
+ static int format_shift(unsigned int format);
+ static bool format_want_q(unsigned int format);
+ static bool format_bypass_halfband(unsigned int format);
+
+ bool _write_fpga_reg (int regno, unsigned int value);
+ bool _write_fpga_reg_masked (int regno, unsigned int value, int mask);
+ unsigned int _read_fpga_reg (int regno);
+ bool _write_9862 (int which_codec, int regno, unsigned char value);
+ unsigned int _read_9862 (int which_codec, int regno) const;
+ bool _write_spi (int optional_header, int enables, int format, std::string
buf);
+ std::string _read_spi (int optional_header, int enables, int format, int
len);
+
+};
+
+
+// ================================================================
+// concrete sources
+// ================================================================
+
+GR_SWIG_BLOCK_MAGIC(usrp1,source_c)
+
+usrp1_source_c_sptr
+usrp1_make_source_c (int which_board=0,
+ unsigned int decim_rate=64,
+ int nchan=1,
+ int mux=0x32103210,
+ int mode=0,
+ int fusb_block_size=0,
+ int fusb_nblocks=0,
+ const std::string fpga_filename="",
+ const std::string firmware_filename=""
+ ) throw (std::runtime_error);
+
+class usrp1_source_c : public usrp1_source_base {
+ protected:
+ usrp1_source_c (int which_board, unsigned int decim_rate,
+ int nchan, int mux, int mode, int fusb_block_size, int
fusb_nblocks,
+ const std::string fpga_filename, const std::string
fgpa_filename);
+
+
+ public:
+ ~usrp1_source_c ();
+};
+
+// ----------------------------------------------------------------
+
+#if 0
+
+GR_SWIG_BLOCK_MAGIC(usrp1,source_s)
+
+usrp1_source_s_sptr
+usrp1_make_source_s (int which_board,
+ unsigned int decim_rate,
+ int nchan,
+ int mux,
+ int mode,
+ int fusb_block_size,
+ int fusb_nblocks,
+ const std::string fpga_filename,
+ const std::string firmware_filename
+ ) throw (std::runtime_error);
+
+
+class usrp1_source_s : public usrp1_source_base {
+ protected:
+ usrp1_source_s (int which_board, unsigned int decim_rate,
+ int nchan, int mux, int mode);
+
+ public:
+ ~usrp1_source_s ();
+};
+#endif
Modified:
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_base.cc
===================================================================
--- gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_base.cc
2008-07-13 16:40:06 UTC (rev 8871)
+++ gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_base.cc
2008-07-13 17:15:29 UTC (rev 8872)
@@ -1,6 +1,6 @@
/* -*- c++ -*- */
/*
- * Copyright 2004 Free Software Foundation, Inc.
+ * Copyright 2004,2008 Free Software Foundation, Inc.
*
* This file is part of GNU Radio
*
@@ -43,9 +43,7 @@
const std::string fpga_filename,
const std::string firmware_filename
) throw (std::runtime_error)
- : gr_sync_block (name,
- gr_make_io_signature (0, 0, 0),
- output_signature),
+ : usrp1_base(name, gr_make_io_signature (0, 0, 0), output_signature),
d_noverruns (0)
{
d_usrp = usrp_standard_rx::make (which_board, decim_rate,
Modified:
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_base.h
===================================================================
--- gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_base.h
2008-07-13 16:40:06 UTC (rev 8871)
+++ gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_base.h
2008-07-13 17:15:29 UTC (rev 8872)
@@ -1,6 +1,6 @@
/* -*- c++ -*- */
/*
- * Copyright 2004 Free Software Foundation, Inc.
+ * Copyright 2004,2008 Free Software Foundation, Inc.
*
* This file is part of GNU Radio
*
@@ -23,7 +23,7 @@
#ifndef INCLUDED_USRP1_SOURCE_BASE_H
#define INCLUDED_USRP1_SOURCE_BASE_H
-#include <gr_sync_block.h>
+#include <usrp1_base.h>
#include <stdexcept>
class usrp_standard_rx;
@@ -31,7 +31,8 @@
/*!
* \brief abstract interface to Universal Software Radio Peripheral Rx path
(Rev 1)
*/
-class usrp1_source_base : public gr_sync_block {
+class usrp1_source_base : public usrp1_base
+{
private:
usrp_standard_rx *d_usrp;
int d_noverruns;
Modified:
gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_c.cc
===================================================================
--- gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_c.cc
2008-07-13 16:40:06 UTC (rev 8871)
+++ gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_c.cc
2008-07-13 17:15:29 UTC (rev 8872)
@@ -1,6 +1,6 @@
/* -*- c++ -*- */
/*
- * Copyright 2004,2006 Free Software Foundation, Inc.
+ * Copyright 2004,2006,2008 Free Software Foundation, Inc.
*
* This file is part of GNU Radio
*
@@ -72,6 +72,12 @@
fusb_block_size, fusb_nblocks,
fpga_filename, firmware_filename)
{
+ _ensure_rev2(which_board);
+
+ int dbid = daughterboard_id(which_board);
+
+ d_db[0] = instantiate_dbs(dbid, this, which_board);
+ d_db[1] = instantiate_dbs(dbid, this, which_board);
}
usrp1_source_c::~usrp1_source_c ()
Modified: gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_c.h
===================================================================
--- gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_c.h
2008-07-13 16:40:06 UTC (rev 8871)
+++ gnuradio/branches/developers/trondeau/dbs/gr-usrp/src/usrp1_source_c.h
2008-07-13 17:15:29 UTC (rev 8872)
@@ -1,6 +1,6 @@
/* -*- c++ -*- */
/*
- * Copyright 2004 Free Software Foundation, Inc.
+ * Copyright 2004,2008 Free Software Foundation, Inc.
*
* This file is part of GNU Radio
*
@@ -24,29 +24,28 @@
#define INCLUDED_USRP1_SOURCE_C_H
#include <usrp1_source_base.h>
+#include <db_boards.h>
#include <stdexcept>
-class usrp_standard_rx;
-
class usrp1_source_c;
typedef boost::shared_ptr<usrp1_source_c> usrp1_source_c_sptr;
-// public shared_ptr constructor
-
usrp1_source_c_sptr
-usrp1_make_source_c (int which_board,
- unsigned int decim_rate,
- int nchan,
- int mux,
- int mode,
- int fusb_block_size,
- int fusb_nblocks,
- const std::string fpga_filename,
- const std::string firmware_filename
+usrp1_make_source_c (int which_board=0,
+ unsigned int decim_rate=64,
+ int nchan=1,
+ int mux=0x32103210,
+ int mode=0,
+ int fusb_block_size=0,
+ int fusb_nblocks=0,
+ const std::string fpga_filename="",
+ const std::string firmware_filename=""
) throw (std::runtime_error);
+// public shared_ptr constructor
+
/*!
* \brief interface to Universal Software Radio Peripheral Rx path (Rev 1)
*/
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