[Commit-gnuradio] r9051 - gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/testbenches

[gnychis]

Author: gnychis
Date: 2008-07-29 14:58:04 -0600 (Tue, 29 Jul 2008)
New Revision: 9051

Modified:
   
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/testbenches/tb_timestamps.v
Log:
fixing up rate and output

Modified: 
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/testbenches/tb_timestamps.v
===================================================================
--- 
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/testbenches/tb_timestamps.v
  2008-07-29 20:50:14 UTC (rev 9050)
+++ 
gnuradio/branches/developers/gnychis/fpga/usrp/fpga/inband_lib/testbenches/tb_timestamps.v
  2008-07-29 20:58:04 UTC (rev 9051)
@@ -51,7 +51,7 @@
 
   // I am not sure of this...
   strobe_gen sgen
-    (.clock(rxclk), .reset(reset), .enable(1'b1), .rate(8'd64), 
.strobe_in(1'b1), .strobe(rxstrobe));
+    (.clock(rxclk), .reset(reset), .enable(1'b1), .rate(8'd63), 
.strobe_in(1'b1), .strobe(rxstrobe));
 
   always
     #5 rxclk = ~rxclk;
@@ -95,8 +95,16 @@
       timestamp_clock <= timestamp_clock + 32'd1;
       signal <= signal + 16'd1;
 
+    end
+  
+  always @(posedge usbclk)
+    begin
       if(have_pkt_rdy == 1'b1)
         begin
+          RD <= 1'b1;
+        end
+      if(RD == 1'b1)
+        begin
           $fwrite(out_file, usbdata);
         end
     end