[Commit-gnuradio] r9551 - usrp2/trunk/fpga/top/u2_rev2

[matt]

Author: matt
Date: 2008-09-10 15:37:57 -0600 (Wed, 10 Sep 2008)
New Revision: 9551

Modified:
   usrp2/trunk/fpga/top/u2_rev2/Makefile
   usrp2/trunk/fpga/top/u2_rev2/u2_rev2.v
Log:
catching up with u2_core, plus a makefile fix


Modified: usrp2/trunk/fpga/top/u2_rev2/Makefile
===================================================================
--- usrp2/trunk/fpga/top/u2_rev2/Makefile       2008-09-10 15:30:20 UTC (rev 
9550)
+++ usrp2/trunk/fpga/top/u2_rev2/Makefile       2008-09-10 21:37:57 UTC (rev 
9551)
@@ -87,6 +87,8 @@
 control_lib/simple_uart_tx.v \
 control_lib/simple_uart_rx.v \
 control_lib/oneshot_2clk.v \
+control_lib/sd_spi.v \
+control_lib/sd_spi_wb.v \
 coregen/fifo_xlnx_2Kx36_2clk.v \
 coregen/fifo_xlnx_2Kx36_2clk.xco \
 coregen/fifo_xlnx_512x36_2clk.v \
@@ -190,19 +192,9 @@
 "Use Synchronous Reset" Auto \
 "Use Synchronous Set" Auto
 
-#export TRANSLATE_PROPERTIES := \
-#"Macro Search Path" "$(SOURCE_ROOT)coregen/"
-#export TRANSLATE_PROPERTIES := \
-#"Macro Search Path" "$(shell pwd)/../../coregen/"
 export TRANSLATE_PROPERTIES := \
-"Macro Search Path" "../../coregen/"
+"Macro Search Path" "$(shell pwd)/../../coregen/"
 
-QUICK_MAP_PROPERTIES := \
-"Allow Logic Optimization Across Hierarchy" TRUE \
-"Map to Input Functions" 4 \
-"Optimization Strategy (Cover Mode)" Speed \
-"Pack I/O Registers/Latches into IOBs" "For Inputs and Outputs"
-
 export MAP_PROPERTIES := \
 "Allow Logic Optimization Across Hierarchy" TRUE \
 "Map to Input Functions" 4 \
@@ -248,9 +240,6 @@
 bin:
        PROCESS_RUN="Generate Programming File" $(XTCLSH) $(ISE_HELPER)         
 
-quick:
-       PROCESS_RUN="Generate Programming File" 
MAP_PROPERTIES='$(QUICK_MAP_PROPERTIES)' $(XTCLSH) $(ISE_HELPER)                
-
 clean:
        rm -rf $(BUILD_DIR)
 

Modified: usrp2/trunk/fpga/top/u2_rev2/u2_rev2.v
===================================================================
--- usrp2/trunk/fpga/top/u2_rev2/u2_rev2.v      2008-09-10 15:30:20 UTC (rev 
9550)
+++ usrp2/trunk/fpga/top/u2_rev2/u2_rev2.v      2008-09-10 21:37:57 UTC (rev 
9551)
@@ -362,6 +362,8 @@
                     .cpld_din          (cpld_din),
                     .cpld_clk          (cpld_clk),
                     .cpld_detached     (cpld_detached),
+                    .por               (~POR),
+                    .config_success    (config_success),
                     .adc_a             (adc_a_reg2),
                     .adc_ovf_a         (adc_ovf_a_reg2),
                     .adc_on_a          (adc_on_a),