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[dmidecode] [PATCH 4/6] dmidecode: Helper function to print CPUID
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From: |
Jean Delvare |
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Subject: |
[dmidecode] [PATCH 4/6] dmidecode: Helper function to print CPUID |
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Date: |
Thu, 4 Mar 2021 17:47:55 +0100 |
Split the printing of the CPUID into a human-friendly way to a
separate function. That way, it can be reused for other record types
as needed.
Signed-off-by: Jean Delvare <jdelvare@suse.de>
---
dmidecode.c | 116 ++++++++++++++++++++++++++++++++----------------------------
dmidecode.h | 1
2 files changed, 64 insertions(+), 53 deletions(-)
--- dmidecode.orig/dmidecode.c 2021-03-04 14:31:13.138910053 +0100
+++ dmidecode/dmidecode.c 2021-03-04 14:32:29.362789262 +0100
@@ -1113,57 +1113,11 @@ static enum cpuid_type dmi_get_cpuid_typ
return cpuid_none;
}
-static void dmi_processor_id(const struct dmi_header *h)
+void dmi_print_cpuid(const char *label, enum cpuid_type sig, const u8 *p)
{
- /* Intel AP-485 revision 36, table 2-4 */
- static const char *flags[32] = {
- "FPU (Floating-point unit on-chip)", /* 0 */
- "VME (Virtual mode extension)",
- "DE (Debugging extension)",
- "PSE (Page size extension)",
- "TSC (Time stamp counter)",
- "MSR (Model specific registers)",
- "PAE (Physical address extension)",
- "MCE (Machine check exception)",
- "CX8 (CMPXCHG8 instruction supported)",
- "APIC (On-chip APIC hardware supported)",
- NULL, /* 10 */
- "SEP (Fast system call)",
- "MTRR (Memory type range registers)",
- "PGE (Page global enable)",
- "MCA (Machine check architecture)",
- "CMOV (Conditional move instruction supported)",
- "PAT (Page attribute table)",
- "PSE-36 (36-bit page size extension)",
- "PSN (Processor serial number present and enabled)",
- "CLFSH (CLFLUSH instruction supported)",
- NULL, /* 20 */
- "DS (Debug store)",
- "ACPI (ACPI supported)",
- "MMX (MMX technology supported)",
- "FXSR (FXSAVE and FXSTOR instructions supported)",
- "SSE (Streaming SIMD extensions)",
- "SSE2 (Streaming SIMD extensions 2)",
- "SS (Self-snoop)",
- "HTT (Multi-threading)",
- "TM (Thermal monitor supported)",
- NULL, /* 30 */
- "PBE (Pending break enabled)" /* 31 */
- };
- const u8 *data = h->data;
- const u8 *p = data + 0x08;
- enum cpuid_type sig = dmi_get_cpuid_type(h);
- u32 eax, edx, midr;
+ u32 eax, midr;
u16 dx;
- /*
- * This might help learn about new processors supporting the
- * CPUID instruction or another form of identification.
- */
- if (!(opt.flags & FLAG_QUIET))
- pr_attr("ID", "%02X %02X %02X %02X %02X %02X %02X %02X",
- p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7]);
-
switch (sig)
{
case cpuid_80386:
@@ -1171,7 +1125,7 @@ static void dmi_processor_id(const struc
/*
* 80386 have a different signature.
*/
- pr_attr("Signature",
+ pr_attr(label,
"Type %u, Family %u, Major Stepping %u, Minor
Stepping %u",
dx >> 12, (dx >> 8) & 0xF,
(dx >> 4) & 0xF, dx & 0xF);
@@ -1179,7 +1133,7 @@ static void dmi_processor_id(const struc
case cpuid_80486:
dx = WORD(p);
- pr_attr("Signature",
+ pr_attr(label,
"Type %u, Family %u, Model %u, Stepping %u",
(dx >> 12) & 0x3, (dx >> 8) & 0xF,
(dx >> 4) & 0xF, dx & 0xF);
@@ -1194,7 +1148,7 @@ static void dmi_processor_id(const struc
*/
if (midr == 0)
return;
- pr_attr("Signature",
+ pr_attr(label,
"Implementor 0x%02x, Variant 0x%x, Architecture
%u, Part 0x%03x, Revision %u",
midr >> 24, (midr >> 20) & 0xF,
(midr >> 16) & 0xF, (midr >> 4) & 0xFFF, midr &
0xF);
@@ -1208,7 +1162,7 @@ static void dmi_processor_id(const struc
* explained in table 3-5, but DMI doesn't support this
* yet.
*/
- pr_attr("Signature",
+ pr_attr(label,
"Type %u, Family %u, Model %u, Stepping %u",
(eax >> 12) & 0x3,
((eax >> 20) & 0xFF) + ((eax >> 8) & 0x0F),
@@ -1218,7 +1172,7 @@ static void dmi_processor_id(const struc
case cpuid_x86_amd: /* AMD, publication #25481 revision 2.28 */
eax = DWORD(p);
- pr_attr("Signature", "Family %u, Model %u, Stepping %u",
+ pr_attr(label, "Family %u, Model %u, Stepping %u",
((eax >> 8) & 0xF) + (((eax >> 8) & 0xF) == 0xF
? (eax >> 20) & 0xFF : 0),
((eax >> 4) & 0xF) | (((eax >> 8) & 0xF) == 0xF
? (eax >> 12) & 0xF0 : 0),
eax & 0xF);
@@ -1226,6 +1180,62 @@ static void dmi_processor_id(const struc
default:
return;
}
+}
+
+static void dmi_processor_id(const struct dmi_header *h)
+{
+ /* Intel AP-485 revision 36, table 2-4 */
+ static const char *flags[32] = {
+ "FPU (Floating-point unit on-chip)", /* 0 */
+ "VME (Virtual mode extension)",
+ "DE (Debugging extension)",
+ "PSE (Page size extension)",
+ "TSC (Time stamp counter)",
+ "MSR (Model specific registers)",
+ "PAE (Physical address extension)",
+ "MCE (Machine check exception)",
+ "CX8 (CMPXCHG8 instruction supported)",
+ "APIC (On-chip APIC hardware supported)",
+ NULL, /* 10 */
+ "SEP (Fast system call)",
+ "MTRR (Memory type range registers)",
+ "PGE (Page global enable)",
+ "MCA (Machine check architecture)",
+ "CMOV (Conditional move instruction supported)",
+ "PAT (Page attribute table)",
+ "PSE-36 (36-bit page size extension)",
+ "PSN (Processor serial number present and enabled)",
+ "CLFSH (CLFLUSH instruction supported)",
+ NULL, /* 20 */
+ "DS (Debug store)",
+ "ACPI (ACPI supported)",
+ "MMX (MMX technology supported)",
+ "FXSR (FXSAVE and FXSTOR instructions supported)",
+ "SSE (Streaming SIMD extensions)",
+ "SSE2 (Streaming SIMD extensions 2)",
+ "SS (Self-snoop)",
+ "HTT (Multi-threading)",
+ "TM (Thermal monitor supported)",
+ NULL, /* 30 */
+ "PBE (Pending break enabled)" /* 31 */
+ };
+ const u8 *data = h->data;
+ const u8 *p = data + 0x08;
+ enum cpuid_type sig = dmi_get_cpuid_type(h);
+ u32 edx;
+
+ /*
+ * This might help learn about new processors supporting the
+ * CPUID instruction or another form of identification.
+ */
+ if (!(opt.flags & FLAG_QUIET))
+ pr_attr("ID", "%02X %02X %02X %02X %02X %02X %02X %02X",
+ p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7]);
+
+ dmi_print_cpuid("Signature", sig, p);
+
+ if (sig != cpuid_x86_intel && sig != cpuid_x86_amd)
+ return;
edx = DWORD(p + 4);
if ((edx & 0xBFEFFBFF) == 0)
--- dmidecode.orig/dmidecode.h 2021-03-04 14:31:13.138910053 +0100
+++ dmidecode/dmidecode.h 2021-03-04 14:32:29.362789262 +0100
@@ -46,5 +46,6 @@ enum cpuid_type cpuid_type;
int is_printable(const u8 *data, int len);
const char *dmi_string(const struct dmi_header *dm, u8 s);
void dmi_print_memory_size(const char *addr, u64 code, int shift);
+void dmi_print_cpuid(const char *label, enum cpuid_type sig, const u8 *p);
#endif
--
Jean Delvare
SUSE L3 Support