bug#57291: closed (New package: fftgen)

[GNU bug Tracking System]

Your message dated Fri, 02 Sep 2022 17:29:49 +0200
with message-id <87zgfhu74i.fsf@gnu.org>
and subject line Re: bug#57291: New package: fftgen
has caused the debbugs.gnu.org bug report #57291,
regarding New package: fftgen
to be marked as done.

(If you believe you have received this mail in error, please contact
help-debbugs@gnu.org.)


-- 
57291: https://debbugs.gnu.org/cgi/bugreport.cgi?bug=57291
GNU Bug Tracking System
Contact help-debbugs@gnu.org with problems
> --- Begin Message ---
>
>
>
> Subject: 
>
> New package: fftgen
>
>
>
>
> Date: 
>
> Fri, 19 Aug 2022 01:18:41 +0200
>
>
>
>
> Hi!
>
> I've stumbled upon this beautiful little piece of software that let's
> you generate FFT designs in Verilog.  Since it's free software I thought
> I'd ready it up for my favorite distribution!
>
> Thanks for merging!
>
> gabriel
>
>
> >From 189ae40cb6104ac703f0171e32fe88208f9fcc25 Mon Sep 17 00:00:00 2001
> From: Gabriel Wicki <gabriel@erlikon.ch>
> Date: Fri, 19 Aug 2022 01:14:06 +0200
> Subject: [PATCH] gnu: Add fftgen.
>
> * gnu/packages/fpga.scm (fftgen): New variable.
> ---
>  gnu/packages/fpga.scm | 31 +++++++++++++++++++++++++++++++
>  1 file changed, 31 insertions(+)
>
> diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
> index 06d4a10e7e..e1ae577c65 100644
> --- a/gnu/packages/fpga.scm
> +++ b/gnu/packages/fpga.scm
> @@ -552,3 +552,34 @@ (define-public verilator
>  performs the design simulation.  Verilator also supports linking its generated
>  libraries, optionally encrypted, into other simulators.")
>      (license license:lgpl3)))
> +
> +(define-public fftgen
> +  (let ((commit "1d75a992efd0528edea128a903aafdabe133cb08")
> +        (revision "0"))
> +    (package
> +      (name "fftgen")
> +      (version (git-version "0" revision commit))
> +      (source (origin
> +                (method git-fetch)
> +                (uri (git-reference
> +                      (url "https://github.com/ZipCPU/dblclockfft";)
> +                      (commit commit)))
> +                (file-name (git-file-name name
> +                                          (string-take commit 8)))
> +                (sha256
> +                 (base32
> +                  "0qq874yalzpjdwnxhc5df8a0ifywv29wcncb09945x56xplvkcmd"))))
> +      (build-system gnu-build-system)
> +      (arguments
> +       `(#:tests? #f
> +         #:phases (modify-phases %standard-phases
> +                    (delete 'configure)
> +                    (replace 'install
> +                      (lambda* (#:key outputs #:allow-other-keys)
> +                        (let ((bin (string-append (assoc-ref outputs "out")
> +                                                  "/bin")))
> +                          (install-file "sw/fftgen" bin) #t))))))
> +      (synopsis "Generic Pipelined FFT Core Generator")
> +      (description "fftgen produces FFT hardware designs in Verilog.")
> +      (home-page "https://zipcpu.com/";)
> +      (license license:lgpl3))))
> -- 
> 2.36.1
>
>
>
>
> --- End Message ---
> --- Begin Message ---
>
>
>
> Subject: 
>
> Re: bug#57291: New package: fftgen
>
>
>
>
> Date: 
>
> Fri, 02 Sep 2022 17:29:49 +0200
>
>
>
>
> User-agent: 
>
> Gnus/5.13 (Gnus v5.13) Emacs/28.1 (gnu/linux)
>
>
>
>
> Hi,
>
> Gabriel Wicki <gabriel@erlikon.ch> skribis:
>
> >>From 189ae40cb6104ac703f0171e32fe88208f9fcc25 Mon Sep 17 00:00:00 2001
> > From: Gabriel Wicki <gabriel@erlikon.ch>
> > Date: Fri, 19 Aug 2022 01:14:06 +0200
> > Subject: [PATCH] gnu: Add fftgen.
> >
> > * gnu/packages/fpga.scm (fftgen): New variable.
>
> Applied with the minor changes below, thanks!
>
> Ludo’.
>
> diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
> index e1ae577c65..58b81bf83a 100644
> --- a/gnu/packages/fpga.scm
> +++ b/gnu/packages/fpga.scm
> @@ -554,7 +554,7 @@ (define-public verilator
>      (license license:lgpl3)))
>  
>  (define-public fftgen
> -  (let ((commit "1d75a992efd0528edea128a903aafdabe133cb08")
> +  (let ((commit "1d75a992efd0528edea128a903aafdabe133cb08") ;no releases
>          (revision "0"))
>      (package
>        (name "fftgen")
> @@ -564,22 +564,23 @@ (define-public fftgen
>                  (uri (git-reference
>                        (url "https://github.com/ZipCPU/dblclockfft";)
>                        (commit commit)))
> -                (file-name (git-file-name name
> -                                          (string-take commit 8)))
> +                (file-name (git-file-name name version))
>                  (sha256
>                   (base32
>                    "0qq874yalzpjdwnxhc5df8a0ifywv29wcncb09945x56xplvkcmd"))))
>        (build-system gnu-build-system)
>        (arguments
> -       `(#:tests? #f
> +       `(#:tests? #f                              ;no tests
> +         #:make-flags '("CFLAGS=-g -O2")          ;default flags lack -O2
>           #:phases (modify-phases %standard-phases
>                      (delete 'configure)
>                      (replace 'install
>                        (lambda* (#:key outputs #:allow-other-keys)
>                          (let ((bin (string-append (assoc-ref outputs "out")
>                                                    "/bin")))
> -                          (install-file "sw/fftgen" bin) #t))))))
> -      (synopsis "Generic Pipelined FFT Core Generator")
> -      (description "fftgen produces FFT hardware designs in Verilog.")
> +                          (install-file "sw/fftgen" bin)))))))
> +      (synopsis "Generic pipelined FFT core generator")
> +      (description "fftgen produces @acronym{FFT, fast-Fourier transforms}
> +hardware designs in Verilog.")
>        (home-page "https://zipcpu.com/";)
> -      (license license:lgpl3))))
> +      (license license:lgpl3+))))
>
> --- End Message ---