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Re: [Freeipmi-users] DCMI questions.


From: Albert Chu
Subject: Re: [Freeipmi-users] DCMI questions.
Date: Wed, 21 Jul 2010 09:33:16 -0700

Hi Dick,

On Wed, 2010-07-21 at 05:20 -0700, address@hidden wrote:
> Having looked at the DCMI spec and played around with DCMI support on
> a few SP's I have a couple of questions people here might know the
> answers to.
> 
> -  Are there people actively working on DCMI or is it considered
> stable and finished.  The Intel DCMI site doesn't mention any working
> group.

Can't speak to this one, I'm not on the "inside".

> -     The 'Exception Actions' list in Get/Set Power Limit appears to be a
> bitmask mapping to actions the service processor will take if the
> power limit is exceeded for too long a time.   Other than bit 1 which
> is defined as 'hard power off the server' the rest of the values are
> vendor specific?

Yup.  I only know of several OEM actions from a Fujitsu developer awhile
back:

----
P.S. Regarding OEM exception action we currently do support
'continue' (0x02) and 'shutdown' (0x03) in addition to the 'hard power
off'.
----

I'm sure there are others for other manufacturers, but they are unknown
to me.

> Are there plans to codify other values into the standard?

Can't speak to this.

> -     There are two sampling periods referred to in the spec - bytes 15-18
> of Get Power Reading and bytes 14-15 of Get/Set Power Limit.  Are
> these the same?  If not, does this mean the Get Power Reading value is
> read-only and set by the BMC manufacturer?

My understanding is they are different.  The sample period for Get Power
Reading is set by the manufacturer.  Naturally, there may be OEM
extensions by some vendors that may allow configuration, but I cannot
speak of any unknown OEM extensions.

Hope this helps,

Al

> 
> Thanks for any and all insights,
> Dick
> 
> _______________________________________________
> Freeipmi-users mailing list
> address@hidden
> http://*lists.gnu.org/mailman/listinfo/freeipmi-users
> 
-- 
Albert Chu
address@hidden
Computer Scientist
High Performance Systems Division
Lawrence Livermore National Laboratory




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