Re: [Gcl-devel] clear_cache on Alpha architecture not implemented?

[Camm Maguire]

Greetings, and thanks foro looking into this!

Witold Baryluk <address@hidden> writes:

> On 05-03 09:19, Camm Maguire wrote:
>> Greetings!  The build succeeded, which, alas, means the failure at
>> 
>> http://buildd.debian-ports.org/status/fetch.php?pkg=axiom&arch=alpha&ver=20120301-3&stamp=1335722507
>> 
>> is again unreproducible, like the kfree_amd64 and ppc examples.  Sigh.
>> Are there known differences in the cpu cache clearing instructions
>> between imago and your machine? 
>> 
>> In any case, can one upload by hand builds to debian-ports like one can
>> into the official repository?
>> 
>> Take care,
>> -- 
>> Camm Maguire                                     address@hidden
>> ==========================================================================
>> "The earth is but one country, and mankind its citizens."  --  Baha'u'llah
>
> After lots of investigation, it looks that imb (I-cache memory barrier,
> used for flushing instruction cache on single cpu), is not emited or
> called when doing __builtin___clear_cache!
>
> It shouldn't be hard to add, for example using (define_expand
> "clear_cache" ... in gcc/config/alpha/alpha.md in gcc, or in 
> libgcc/config/alpha/linux.h
> as #define CLEAR_INSN_CACHE(beg, end) ...
>
> Either of them should just emit, "call_pal 0x86". It is better than
> "imb" because imb is not implemented in Tru64 assembler, and better than
> "call_pal pal_imb", because pal_imb (which is equal 134), requires
> include <pal.h>.
>
> Beyond that it would be naccassary to update kernel, to detect that user
> code called imb, by checking if proper flag in HWPCB structure is set,
> and call smp_imb() if naccassary on multi-processor system (probably
> when rescheduling this process on different cpu) and clear hwpcb flag,
> becuause imb invalidated Icache only on running cpu.
>
>
> Build of axiom package successed on my machine probably by luck, and by
> the fact it is single CPU machine with smaller cache than imago (and
> older subarchitecture, thus probably less agressive caching).
>
> What alpha maintainers thinks?

Pending a true fix, here is the gcl situation when built on alpha:

checking for main in -lX11... yes
checking for xdr_double... yes
checking __builtin___clear_cache... yes


and the relvant gcl code:

#define PAL_imb         134
#define imb() \
__asm__ __volatile__ ("call_pal %0 #imb" : : "i" (PAL_imb) : "memory")
#define CLEAR_CACHE imb()


#ifdef HAVE_BUILTIN_CLEAR_CACHE
static int
clear_protect_memory(object memory) {

  void *p,*pe;
  int i;

  p=(void *)((unsigned long)memory->cfd.cfd_start & ~(PAGESIZE-1));
  pe=(void *)((unsigned long)(memory->cfd.cfd_start+memory->cfd.cfd_size) & 
~(PAGESIZE-1)) + PAGESIZE-1;

  i=mprotect(p,pe-p,PROT_READ|PROT_WRITE|PROT_EXEC);

  __builtin___clear_cache((void *)memory->cfd.cfd_start,(void 
*)memory->cfd.cfd_start+memory->cfd.cfd_size);

  return i;

}
#endif

....

#ifdef HAVE_BUILTIN_CLEAR_CACHE
  massert(!clear_protect_memory(memory));
#else
#ifdef CLEAR_CACHE
  CLEAR_CACHE;
#endif
#endif  


The goal was to exercise the very helpful gcc __builtin___clear_cache
support, and to avoid having to maintain our own assembler for all the
different cpus in this regard.  Clearly, it is easy to revert this on a
per architecture basis if absolutely necessary.  If gcc does or does not
plan on fixing this, please let me know so gcl can adjust as needed.

Take care,
-- 
Camm Maguire                                        address@hidden
==========================================================================
"The earth is but one country, and mankind its citizens."  --  Baha'u'llah