Re: [gpsd-dev] SHM refclock improvements

[Eric S. Raymond]

Hal Murray <address@hidden>:
> The key is that the writer updates X then Y while the reader reads them in 
> the opposite order.
> 
> Note that the reader never writes to shared memory and the writer never reads 
> anything.  That allows multiple readers.
> 
> X and Y need to be sized so they are atomically updatable.  The code also 
> needs cache flushes in the right places.  I think a cache flush is a no-op on 
> x86.  I think it needs real code on ARM and others.  There should be a FAQ on 
> this, but I didn't find it with a quick search.

Heh.  We actually use this very technique in *our* SHM interface.
-- 
                <a href="http://www.catb.org/~esr/";>Eric S. Raymond</a>