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Re: [PATCH] ARM U-Boot BSS zeroing
From: |
Vladimir 'phcoder' Serbinenko |
Subject: |
Re: [PATCH] ARM U-Boot BSS zeroing |
Date: |
Tue, 14 May 2013 18:09:07 +0200 |
On May 14, 2013 3:02 PM, "Goswin von Brederlow" <address@hidden> wrote:
>
> On Mon, May 13, 2013 at 03:37:32PM +0000, Leif Lindholm wrote:
> > The import into the collaborative branch discarded the call to
> > get_real_bss_start before starting the BSS zeroing operation.
> >
> > While get_real_bss_start might have been a bit of an ugly hack,
> > simply discarding it means that we now end up doing unaligned
> > STR operations, and any platform with MMU disabled fails to boot.
> >
> > The attached patch prepends a bytewise zeroing loop until
> > word-aligned, and then continue as before.
> >
> > /
> > Leif
>
> > === modified file 'grub-core/kern/arm/uboot/startup.S'
> > --- grub-core/kern/arm/uboot/startup.S 2013-05-03 13:07:39 +0000
> > +++ grub-core/kern/arm/uboot/startup.S 2013-05-13 14:59:43 +0000
> > @@ -100,7 +100,13 @@
> > @ Since we _are_ the C run-time, we need to manually zero the BSS
> > @ region before continuing
> > ldr r0, =EXT_C(__bss_start) @ zero from here
> > - ldr r1, =EXT_C(_end) @ to here
> > + @ If unaligned, bytewise zero until base address aligned.
> > + mov r1, #0
> > +1: tst r0, #3
> > + beq 2f
> > + strb r1, [r0], #1
> > + b 1b
> > +2: ldr r1, =EXT_C(_end) @ to here
> > mov r2, #0
> > 1: str r2, [r0], #4
> > cmp r0, r1
>
> What if I have a 1 byte BSS aligned at 1 byte? You would zero 3 bytes
> and overshoot _end and then what happens after the cmp in the last line?
>
Abaolutely irrelevant. our BSS isn't that small
> MfG
> Goswin
>
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