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From: | Philip McGrath |
Subject: | [bug#70065] [PATCH v2 7/8] gnu: chez-scheme: Update and simplify machine-type handling. |
Date: | Mon, 1 Apr 2024 23:59:13 -0400 |
User-agent: | Mozilla Thunderbird |
Hi Liliana, On 4/1/24 11:45, Liliana Marie Prikler wrote:
Am Montag, dem 01.04.2024 um 02:51 -0400 schrieb Philip McGrath:Since Chez Scheme 10.0.0 supports all of the backends added in Racket's branch, the complexity of '%chez-features-table' is no longer needed. Ideally, even more of this logic could be maintained upstream, but this change will simplify maintenance in the mean time.
>> [...]
+(define-syntax define-machine-types + (lambda (stx) + (syntax-case stx (any) + ((_ any id0 id ...) + #`(define #,(datum->syntax #'id0 '%machine-types) + '(id0 id ...))))))The datum->syntax call here looks weird.
It is a little unusual. The goal is to be able to copy the *use* of define-machine-types directly from the Chez Scheme source code, making it easier to update in the future. The datum->syntax call is needed to synthesize an identifier that will bind in the surrounding context.
+;; The following is copied from s/cmacros.ss, line 36, in the Chez source +(define-machine-types + any + pb tpbYou should maybe comment ;; unthreaded threaded
I wouldn't mind that if you think it would be useful, though I'd rather not do a v3 just for this. If someone does want to add it, I'd strongly prefer for the comment to outside of the define-machine-types S-expression so the use stays exactly as in the Chez source.
+ pb32l tpb32l + pb32b tpb32b + pb64l tpb64l + pb64b tpb64b + i3nt ti3nt + i3osx ti3osx + i3le ti3le + i3fb ti3fb + i3ob ti3ob + i3nb ti3nb + i3s2 ti3s2 + i3qnx ti3qnx + i3gnu ti3gnu + a6nt ta6nt + a6osx ta6osx + a6le ta6le + a6fb ta6fb + a6ob ta6ob + a6nb ta6nb + a6s2 ta6s2 + ppc32osx tppc32osx + ppc32le tppc32le + ppc32fb tppc32fb + ppc32ob tppc32ob + ppc32nb tppc32nb + arm32le tarm32le + arm32fb tarm32fb + arm32ob tarm32ob + arm32nb tarm32nb + arm64nt tarm64nt + arm64osx tarm64osx + arm64le tarm64le + arm64fb tarm64fb + arm64ob tarm64ob + arm64nb tarm64nb + rv64le trv64le + rv64fb trv64fb + rv64ob trv64ob + rv64nb trv64nb + la64le tla64le +)
Thanks, Philip
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