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VHDL projects in emacs
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From: |
address@hidden |
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Subject: |
VHDL projects in emacs |
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Date: |
Wed, 2 Jul 2008 01:05:55 -0700 (PDT) |
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User-agent: |
G2/1.0 |
Hello,
I'm FPGA designer, I work on Xilinx ISE tools (MS Windows XP).
I've started to use emacs a week ago. It looks very impressive.
But..
1. How can I organize working with projects? I have some projects
added to environment through putting their definition in .emacs file.
It looks messy for me. How can I do other way? How you do that?
2. Is there possibility to mark column region for copy/cut?
Best Regards,
Jerzy Gbur
- VHDL projects in emacs,
address@hidden <=